Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemidele
author
supervisor
statement of authorship
Ranganathan Hariharan ; [supervisors: Jaan Raik, Tara Ghasempouri ; Tallinn University of Technology, School of Information Technologies, Department of Computer Systems]
type of dissertation
doktoritöö
university/scientific institution
Tallinna Tehnikaülikool
location of publication
Tallinn
publisher
year of publication
pages
140 p. : ill
series
Tallinn University of Technology. Doctoral thesis = Tallinna Tehnikaülikool. Doktoritöö ; 43/2019
subject term
subject of form
ISSN
2585-6898
ISBN
978-9949-83-467-9
notes
Includes bibliogr
Kättesaadav ka võrguteavikuna
Kokkuvõte eesti keeles
Autori CV inglise ja eesti keeles, lk. 139-140
Thesis (Ph.D.) in Computer and Systems Engineering : Tallinn University of Technology, 2019
TTÜ department
language
inglise
Hariharan, R. Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemidele. Tallinn : TalTech Press, 2019. 140 p. : ill. (Tallinn University of Technology. Doctoral thesis = Tallinna Tehnikaülikool. Doktoritöö ; 43/2019).