Architectural exploration and implementation of CERN LHC Trigger algorithm With FPGA
author
Devadze, Sergei
Nielsen, Christine Elizabeth
Cherezova, Natalia
Mihhailov, Dmitri
Ellervee, Peeter
statement of authorship
Sergei Devadze, Christine E. Nielsen, Natalia Cherezova, Dmitri Mihhailov, Peeter Ellervee
source
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
publisher
IEEE
journal volume number month
vol. 33, 11
year of publication
2025
pages
p. 2998-3007
url
https://doi.org/10.1109/TVLSI.2025.3600044
subject term
andmetöötlus
algoritmid
integraallülitused
andmeedastus
keyword
architecture exploration
data processing
design exploration
field-programmable gate array (FPGA)
high-level synthesis (HLS)
ISSN
1063-8210
notes
Bibliogr.: 19 ref
scientific publication
teaduspublikatsioon
classifier
1.1
Scopus
https://www.scopus.com/sourceid/12300
https://www.scopus.com/pages/publications/105014601257?origin=resultslist
WOS
https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20T%20VLSI%20SYST&year=2024
https://www.webofscience.com/wos/woscc/full-record/WOS:001565182900001
category (general)
Engineering
Tehnika
Computer science
Arvutiteadus
category (sub)
Engineering. Electrical and electronic engineering
Tehnika. Elektri- ja elektroonikatehnika
Computer science. Hardware and architecture
Arvutiteadus. Riistvara ja arhitektuur
Computer science. Software
Arvutiteadus. Tarkvara
TalTech department
arvutisüsteemide instituut
language
inglise