SynAssert: automated synthesis of CSCA leakage patterns into cost-effective security assertions
author
Azarpeyvand, Ali Azarpeyvand
Eslami, Mohammad
Jervan, Gert
Raik, Jaan
Ghasempouri, Tara
statement of authorship
Ali Azarpeyvand, Mohammad Eslami, Gert Jervan, Jaan Raik and Tara Ghasempouri
source
Proceedings of 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
location of publication
Piscataway, New Jersey
publisher
IEEE
year of publication
2025
pages
6 p. : ill
conference name, date
2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 6-9 July 2025
conference location
Kalamata, Greece
url
https://doi.org/10.1109/ISVLSI65124.2025.11130310
subject term
vahemälu
turvalisus
lekked
riistvara
arvutivõrgud
Scopus
https://www.scopus.com/sourceid/21100286357
https://www.scopus.com/pages/publications/105016199367?origin=resultslist
WOS
https://www.webofscience.com/wos/woscc/full-record/WOS:001575951700061
category (general)
Engineering
Tehnika
Computer science
Arvutiteadus
category (sub)
Engineering. Electrical and electronic engineering
Tehnika. Elektri- ja elektroonikatehnika
Engineering. Control and systems engineering
Tehnika. Juhtimis- ja süsteemitehnika
Computer science. Hardware and architecture
Arvutiteadus. Riistvara ja arhitektuur
keyword
Cache Side-Channel Attacks
leakage pattern
register-transfer level
security assertion
security verification
ISSN
2159-3469
2159-3477
ISBN
9798331534776
notes
Bibliogr.: 38 ref
scientific publication
teaduspublikatsioon
classifier
3.1
TalTech department
Department of Computer Systems
arvutisüsteemide instituut
language
English
inglise