Performance analysis of cosimulating processor core in VHDL and SystemC
author
statement of authorship
Syed Saif Abrar, Shyam Kiran .A, Maksim Jenihhin, Jaan Raik, C. Babu
source
Proceedings of the 2013 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 22–25 August 2013, Mysore, India
location of publication
Piscataway
publisher
year of publication
pages
p. 563-568 : ill
conference name, date
2nd International Conference on Advances in Computing, Communications & Informatics, 22–25 August, 2013
conference location
Mysore, India
ISBN
978-1-4673-6215-3
notes
Bibliogr.: 14 ref
TalTech department
language
inglise
Saif Abrar, S., Shyam, K.A., Jenihhin, M., Raik, J., Babu, C. Performance analysis of cosimulating processor core in VHDL and SystemC // Proceedings of the 2013 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 22–25 August 2013, Mysore, India. Piscataway : IEEE, 2013. p. 563-568 : ill.