A 4-Stage pipelined architecture for point multiplication of binary huff curves
variant title
A 4-Stage pipelined architecture for point multiplication of binary huff curves
author
statement of authorship
Muhammad Rashid, Malik Imran, Atif Raza Jafri, and Zahid Mehmood
publisher
journal volume number month
vol. 29, 11
year of publication
pages
art. 2050179
subject term
keyword
pipelined architecture
throughput over area ratio
binary huff curves (BHC)
FPGA implementation
ISSN
0218-1266
notes
Bibliogr.: 32 ref
scientific publication
teaduspublikatsioon
classifier
Scopus
Scopus
TTÜ department
language
inglise
Uurimisrühm
Rashid, M., Imran, M., Jafri, A. R., Mehmood, Z. A 4-Stage pipelined architecture for point multiplication of binary huff curves // Journal of circuits, systems, and computers (2020) vol. 29, 11, art. 2050179. https://doi.org/10.1142/S0218126620501790