Borrione, D., Dushina, J., Pierre, L. - TalTech Research Portal

Formalization of finite state machines with data path for the verification of high-level synthesis

author

Borrione, Dominique

Dušina, Julia

Pierre, Laurence

statement of authorship

Dominique Borrione, Julia Dushina, Laurence Pierre

source

XI Brasilian Symposium on Integrated Circuit Design, September 30 - October 3, 1998, Rio de Janeiro, Brazil : proceedings

location of publication

Los Alamitos

publisher

IEEE Computer Society

year of publication

1998

pages

p. 99-102: ill

ISBN

0-8186-8704-5

notes

Bibl. p. 102

Borrione, D., Dushina, J., Pierre, L. Formalization of finite state machines with data path for the verification of high-level synthesis // XI Brasilian Symposium on Integrated Circuit Design, September 30 - October 3, 1998, Rio de Janeiro, Brazil : proceedings. Los Alamitos : IEEE Computer Society, 1998. p. 99-102: ill.