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A scalable model based RTL framework zamiaCAD for static analysisTšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Tihhomirov, Valentin2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) : October 7-10, 2012 Santa Cruz, USA Dream Inn, Santa Cruz, USA : [proceedings]2012 / p. 171-176 : ill

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Accelerating transient fault injection campaigns by using Dynamic HDL SlicingBagbaba, Ahmet Cagri; Jenihhin, Maksim; Raik, Jaan; Sauer, Christian2019 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019, Helsinki, Finland : proceedings in IEEE Xplore2019 / 7 p. : ill https://doi.org/10.1109/NORCHIP.2019.8906932

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Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

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Efficient fault injection based on dynamic HDL slicing techniqueBagbaba, Ahmet Cagri; Jenihhin, Maksim; Raik, Jaan; Sauer, Christian2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS 2019) : 1-3 July 2019, Greece2019 / p. 52-53 : ill https://doi.org/10.1109/IOLTS.2019.8854419

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Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

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Extensible open-source framework for translating RTL VHDL IP cores to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanProceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 8-10, 2013, Karlovy Vary, Czech Republic2013 / p. 112-115

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Mutation analysis for systemC designs at TLMGuarnieri, Valerio; Bombieri, Nicola; Pravadelli, Graziano; Fummi, Franco; Hantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes12th IEEE Latin American Test Workshop (LATW) : Porto de Galinhas, Brasil, 27-30 March 20112011 / [6] p https://ieeexplore.ieee.org/document/5985925

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Simulation-based equivalence checking between IEEE 1687 ICL and RTLDamljanovic, Aleksa; Jutman, Artur; Portolan, Michele; Tšertov, Anton2019 IEEE International Test Conference (ITC)2019 / paper. 7.3, 8 p. : ill https://doi.org/10.1109/ITC44170.2019.9000181

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