Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill

Advanced topics of FSM design using FPGA educational boards and web-based toolsSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, MargusEast-West Design & Test Symposium : Moscow, September 18-21, 20092009 / p. 446-449 https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5742086

Application-specific hardware accelerator for implementing recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of the IEEE International Conference on Field Programmable Technology (FPT'10) : Beijing, China Dec. 8-10, 20102010 / p. 269-272 : ill https://ieeexplore.ieee.org/document/5681486

Applying FPGA partial reconfiguration for digital system simulationArhipov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 145-148 : ill

An area aware accelerator for elliptic curve point multiplicationImran, Malik; Pagliarini, Samuel Nascimento; Rashid, Muhammad Haroon27th IEEE International Conference on Electronics Circuits and Systems, (ICECS) 2020, Glasgow, UK, Virtual Conference, November 23-25, 2020 : proceedings2020 / 4 p https://doi.org/10.1109/ICECS49266.2020.9294908

Automatic circuit partitioning for FPGAsKrupnova, Helena; Abbara, A.; Brasen, D.; Saucier, GabrieleBEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings1996 / p. 389-392: ill

Clock manipulation for heterogeneous emulation environmentEllervee, Peeter; Arhipov, Anton; Tammemäe, KalleProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 213-216 : ill https://ieeexplore.ieee.org/abstract/document/4126984

Combining multiple sound sources localization hybrid algorithm and fuzzy rule based classification for real-time speaker tracking applicationIbala, Christian; Astapov, Sergei; Riid, AndriInternational journal of microelectronics and computer science2013 / p. 12-25 : ill https://www.researchgate.net/publication/261467057_Combining_Multiple_Sound_Sources_Localization_Hybrid_Algorithm_and_Fuzzy_Rule_Based_Classification_for_Real-time_Speaker_Tracking_Application

Design of FPGA-based circuits using hierarchical finite state machinesSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander2012 http://www.ester.ee/record=b2857138*est

Division algorithms - from past to present chance to improve area time and complexity for digital applicationsPatankar, Udayan Sunil; Flores, Miguel E.; Koel, AntsLAEDC 2020 : Latin American Electron Devices Conference, San José, Costa Rica, February 25-28, 20202020 / 4 p https://doi.org/10.1109/LAEDC49063.2020.9073050

EEG analyzer prototype based on FPGAJenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011) : September 4-6, 2011, Dubrovnik, Croatia : proceedings2011 / p. 101-106 : ill https://ieeexplore.ieee.org/document/6046588

An efficient FPGA-based architecture for contractive autoencodersKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 3 – 6 May 2020, Fayetteville, Arkansas : proceedings2020 / p. 230−230 https://doi.org/10.1109/FCCM48280.2020.00062.

Environment for fault simulation acceleration on FPGAEllervee, Peeter; Raik, Jaan; Tihhomirov, ValentinBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 217-220 : ill

Fast processing of non-repeated values in hardwareSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2017 / p. 74-77 : ill https://doi.org/10.5755/j01.eie.23.3.18336 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Fault emulation on FPGA : a feasibility studyEllervee, Peeter; Raik, Jaan; Tihhomirov, ValentinIEEE NORCHIP 2003 : 21 Norchip Conference : Riga, Latvia, 10-11 November 2003 : proceedings2003 / p. 92-95 : ill https://www.researchgate.net/publication/246171898_Fault_Emulation_on_FPGA_A_Feasibility_Study

Field-programmable logic and applications : from FPGAs to computing paradigm : 8th International Workshop, FPL'98, Tallinn, Estonia, August 31-September 3, 1998 : proceedingsHartenstein, Reiner W.; Keevallik, Andres1998 https://www.ester.ee/record=b1435446*est

FPGA design flow with automated test generationElst, G.; Diener, Karl-Heinz; Ivask, Eero; Raik, Jaan; Ubar, Raimund-JohannesProc. of German 11th Workshop on Test Technology and Reliability of Circuits and Systems : Potsdam, 19991999 / p. 120-123 https://masters.donntu.ru/2010/fknt/masyakin/library/article7.pdf

FPGA netlist partitioning onto heterogeneous FPGA boardsZahm, U.; Glesner, M.BEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 21994 / p. 397-404: ill https://www.ester.ee/record=b2150914*est

FPGA platform based digital design educationMihhailov, Dmitri; Kruus, Margus; Sudnitsõn, AleksanderProceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing : CompSysTech'2008. Vol. 374, ACM International Conference Proceeding Series2008 / p. IV.4-1 - IV.4-6 : ill https://dl.acm.org/doi/pdf/10.1145/1500879.1500938

FPGA technological mapping for low power implementationKasirova, Lilia; Evartson, Teet; Tveretina, OlgaProceedings of the 4th International Workshop Mixed Design of Integrated Circuits and Systems : MIXDES'97 : Poznan, Poland, 12-14 June 19971997 / p. 259-264

FPGA-based critical computing : TEMPUS and FP7 projects issuesKharchenko, Vyacheslav; Vain, Jüri; Krispin, Madli10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 74-79 : ill

FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est

FPGA-based time and cost effective Hamming weight comparators for binary vectorsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, MargusProceedings : EUROCON 2015 : Salamanca, Spain, 8th-11th September2015 / p. 328-333 : ill http://dx.doi.org/10.1109/EUROCON.2015.7313700

FSM decomposition with application to FPGA synthesisSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, Margus; Tarletski, KonstantinInternational Conference on Computer Systems and Technologies - CompSysTech'09 : Ruse, Bulgaria2009 / p. IV.4.1-IV.4.6 https://dl.acm.org/doi/10.1145/1731740.1731820

Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleidMihhailov, Dmitri2011 https://www.ester.ee/record=b2748823*est

Implementation in FPGA of address-based data sortingSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander21st International Conference on Field Programmable Logic and Applications : FPL 2011 : Chania, Crete, Greece, 5-7 September 20112011 / p. 405-410 : ill https://www.researchgate.net/publication/220760392_Implementation_in_FPGA_of_Address-Based_Data_Sorting

Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendinaAbideen, Zain Ul2024 https://digikogu.taltech.ee/et/Item/660d923b-44d2-4993-898f-324ab2088199 https://www.ester.ee/record=b5649944*est https://doi.org/10.23658/taltech.1/2024

Methodology and international collaboration in teaching reconfigurable systemsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderThe 2012 IEEE Global Engineering Education Conference (IEEE EDUCON 2012), Marrakesh, Morocco, Apr. 17-20, 20122012 / p. 1143-1152 : ill https://www.researchgate.net/publication/254034783_Methodology_and_international_collaboration_in_teaching_reconfigurable_systems

Moving average filter block implementation using USP-Awadhoot dividerPatankar, Udayan Sunil; Flores, Miguel E.; Koel, Ants; Patankar, Sunil2024 19th Biennial Baltic Electronics Conference (BEC)2024 / 6 p https://doi.org/10.1109/BEC61458.2024.10737938 Conference proceedings at Scopus Article at Scopus Article at WOS

Network-based hardware accelerators for parallel data processing = Võrgupõhised riistvarakiirendid paralleelseks andmetöötluseksRjabov, Artjom2017 https://digi.lib.ttu.ee/i/?8436 https://www.ester.ee/record=b4685402*est

Neutral-point-clamped quasi-Z-source inverter with field-programmable gate array based controlStepenko, Serhii; Husev, Oleksandr; Vinnikov, Dmitri12th International Symposium "Topical Problems in the Field of Electrical and Power Engineering." Doctoral School of Energy and Geotechnology II : Kuressaare, Estonia, June 11-16, 20122012 / p. 76-77 : ill

A new concept for a self-learning kit for FPGA designHollstein, Thomas; Zahm, U.; Wehn, N.; Herpel, H.-J.; Glesner, M.BEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 21994 / p. 405-410: ill https://www.ester.ee/record=b2150914*est

A new FPGA-based detection method for spurious variations in PCBA power distribution networkOdintsov, Sergei; Bozzoli, Ludovica; De Sio, Corrado; Sterpone, Luca; Jutman, Artur2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 6 p. : ill https://doi.org/10.1109/DDECS.2019.8724662

Novel architectures for contractive autoencoders with embedded learningKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 17th Biennial Baltic electronics conference, Tallinn, Estonia, October 6-8, 2020 : proceedings2020 / 6 p. : ill https://doi.org/10.1109/BEC49624.2020.9277246

Open source on-chip logic analyzer for FPGA-sEhrenpreis, Lauri; Ellervee, Peeter; Tammemäe, KalleBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 99-102 : ill

Optimization of address-based data sorting unit with external memory supportMihhailov, Dmitri; Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderCompSysTech'13 : proceedings of the 14th International Conference on Computer Systems and Technologies2013 / p. 83-90 : ill https://doi.org/10.1145/2516775.2516807 Conference Proceedings at Scopus Article at Scopus

Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill https://doi.org/10.1007/s10836-016-5588-y Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Optimization of FPGA-based circuits for recursive data sortingMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 129-132 : ill

Optimization of recursive sorting algorithms for implementation in hardwareMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of 22nd International Conference on Microelectronics (ICM 2010) : Cairo, Egypt, Dec. 19-22, 20102010 / p. 471-474 : ill https://www.researchgate.net/publication/224213497_Optimization_of_recursive_sorting_algorithms_for_implementation_in_hardware

Parallel FPGA-based implementation of recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) : Cancun, Mexico, December 13-15, 20102010 / p. 121-126 : ill https://www.researchgate.net/publication/221437230_Parallel_FPGA-Based_Implementation_of_Recursive_Sorting_Algorithms

Parallel processing in FPGA-based digital circuits and systemsSklyarov, Valery; Skliarova, Iouliia2013 http://www.ester.ee/record=b2946103*est

Performance evaluation for FPGA-based processing of tree-like structuresSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander19th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Sevilla, Spain, December 9-12, 20122012 / p. 217-220 : ill https://ieeexplore.ieee.org/document/6463762

Polynomial curve fitting by substitutionGorev, Maksim; Pesonen, Vadim; Ellervee, PeeterFPGAWorld'11 : the 8th Annual FPGAWorld Conference : Copenhagen, Stockholm, Munich, September 12-15, 20112011 / [4] p.: ill https://dl.acm.org/doi/pdf/10.1145/2157871.2157872

PrefaceHollstein, Thomas; Raik, Jaan; Kostin, Sergei; Tšertov, Anton; O’Connor, Ian; Reis, RicardoVLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability, 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016 : Revised Selected Papers2017 / p. V-VI https://link.springer.com/book/10.1007/978-3-319-67104-8 Conference proceedings at Scopus Article at Scopus

Processing N-ary trees in reconfigurable hardwareSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2013 25th International Conference on Microelectronics (ICM) : 15–18 December 2013, Beirut-Lebanon2013 / p. 13-16 : ill

Processing tree-like data structures in different computing platformsSklyarov, Valery; Skliarova, Iouliia; Oliveira, Ramiro; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 International Conference on Information and Computer Applications (ICICA 2011) : Dubai, United Arab Emirates, March 18-20, 20112011 / p. 112-116 : ill https://sweet.ua.pt/iouliia/Papers/2011/rp025_ICICA2011-A067.pdf

PSL assertion checkers synthesis with ASM based HLS tool ABELITEJenihhin, Maksim; Baranov, Samary; Raik, Jaan; Tihhomirov, ValentinLATW 2012 : 13th IEEE Latin-American Test Workshop proceedings : April 10th-13th, 2012, Quito, Ecuador2012 / [6 p.] : ill https://ieeexplore.ieee.org/document/6261251

Real-time regulation of beam-based feedback : implementing an FPGA solution for a continuous wave linear acceleratorMaalberg, Andrei; Kuntzsch, Michael; Petlenkov, EduardSensors2022 / art. 6236, 22 p. : ill https://doi.org/10.3390/s22166236 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Reconfigurable multipler for virtex FPGA familyPõldre, Jüri; Tammemäe, KalleField-programmable logic and applications : 9th International Workshop, FPL'99, Glasgow, UK, August 30-September 1, 1999 : proceedings1999 / p. 359-364 : ill https://link.springer.com/chapter/10.1007/978-3-540-48302-1_38

Recursion and hierarchy in digital design and prototyping : a case studyMihhailov, Dmitri; Kruus, Margus; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderComputer Systems and Technologies : 12th International Conference, CompSysTech'11 : Vienna, Austria, June 16-17, 2011 : proceedings2011 / p. 45-50 : ill https://dl.acm.org/doi/pdf/10.1145/2023607.2023616

Solving computationally intensive problems in reconfigurable hardware : a case studySkliarova, Iouliia; Vallejo, Tiago; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusJournal of convergence information technology (JCIT) : an international journal2013 / p. 601-609 : ill

Systematic unsupervised recycled field-programmable gate array detectionIsaka, Yuya; Shintani, Michihiro; Ahmed, Foisal; Inoue, MichikoIEEE transactions on device and materials reliability2022 / 10 p. : ill https://doi.org/10.1109/TDMR.2022.3164788 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Unsupervised recycled FPGA detection using symmetry analysisTarique, Tanvir Ahmad; Ahmed, Foisal; Jenihhin, Maksim; Ali, Liakot12th International Conference on Electrical and Computer Engineering : ICECE 20222022 / p. 437-440 https://doi.org/10.1109/ICECE57408.2022.10088856

User-guided hierarchical FPGA partitioningKrupnova, Helena; Saucier, GabrieleBEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 187-190: ill

Ways for board and system test to benefit from FPGA embedded instrumentationEhrenberg, Heiko; Odintsov, Sergei; Devadze, Sergei; Jutman, Artur; Aleksejev, Igor; Wenzel, Thomas2019 IEEE AUTOTESTCON2019 / 10 p : ill https://doi.org/10.1109/AUTOTESTCON43700.2019.8961057