Acceleration of recursive data sorting over tree-based structuresMihhailov, Dmitri; Sudnitsõn, Aleksander; Sklyarov, Valery; Skliarova, IouliiaElektronika ir elektrotechnika = Electronics and electrical engineering2011 / p. 51-56 : ill https://eejournal.ktu.lt/index.php/elt/article/view/612 Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill Advanced topics of FSM design using FPGA educational boards and web-based toolsSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, MargusEast-West Design & Test Symposium : Moscow, September 18-21, 20092009 / p. 446-449 https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5742086 Application-specific hardware accelerator for implementing recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of the IEEE International Conference on Field Programmable Technology (FPT'10) : Beijing, China Dec. 8-10, 20102010 / p. 269-272 : ill https://ieeexplore.ieee.org/document/5681486 Cooperation of FPGA-based educational boards and web-based point design tools for research and educationSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, MargusIFIP EduTech'09 International Workshop : Florianopolis-Brazil, October 15-16, 20092009 / ? p EEG analyzer prototype based on FPGAJenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011) : September 4-6, 2011, Dubrovnik, Croatia : proceedings2011 / p. 101-106 : ill https://ieeexplore.ieee.org/document/6046588 FPGA platform based digital design educationMihhailov, Dmitri; Kruus, Margus; Sudnitsõn, AleksanderProceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing : CompSysTech'2008. Vol. 374, ACM International Conference Proceeding Series2008 / p. IV.4-1 - IV.4-6 : ill https://dl.acm.org/doi/pdf/10.1145/1500879.1500938 FPGA-based implementation of EEG analyzerGorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Jenihhin, Maksim; Ellervee, PeeterDATE'11 Friday Workshop on "Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing" : Grenoble, France, March 20112011 / [1] p https://www.microsoft.com/en-us/research/wp-content/uploads/2017/03/ellervee.pdf FPGA-based implementation of EEG analyzer for detection of depressive disorderPesonen, Vadim; Gorev, Maksim; Mihhailov, DmitriInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kuuenda aastakonverentsi artiklite kogumik : 3.-5. oktoobril 2012, Laulasmaa2012 / p. 67-70 : ill FPGA-based implementation of EEG analyzer for detection of depressive disorderGorev, Maksim; Pesonen, Vadim; Mihhailov, DmitriInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 69-72 : ill FSM decomposition with application to FPGA synthesisSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, Margus; Tarletski, KonstantinInternational Conference on Computer Systems and Technologies - CompSysTech'09 : Ruse, Bulgaria2009 / p. IV.4.1-IV.4.6 Hardware implementation of recursive algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander53rd IEEE International Midwest Symposium on Circuits and Systems : Seattle, Washington, USA, August 1-4, 2010 : proceedings2010 / p. 225-228 https://ieeexplore.ieee.org/document/5548674 Hardware implementation of recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2011 International Conference on Electronic Devices, Systems and Applications (ICEDSA) : Kuala Lumpur, Malaysia, April 25-27, 2011 : [proceedings]2011 / p. 33-38 : ill Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleidMihhailov, Dmitri2011 https://www.ester.ee/record=b2748823*est High-performance hardware accelerators for sorting and managing prioritiesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, AleksanderProceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany2011 / p. 313-318 : ill HLS-based optimization of tau triggering algorithm for LHC: a case studyCherezova, Natalia; Mihhailov, Dmitri; Devadze, Sergei; Jutman, Artur2022 18th Biennial Baltic Electronics Conference (BEC)2022 / 6 p. : ill https://doi.org/10.1109/BEC56180.2022.9935599 Implementation in FPGA of address-based data sortingSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander21st International Conference on Field Programmable Logic and Applications : FPL 2011 : Chania, Crete, Greece, 5-7 September 20112011 / p. 405-410 : ill https://www.researchgate.net/publication/220760392_Implementation_in_FPGA_of_Address-Based_Data_Sorting Implementation of address-based data sorting on different FPGA platformsSudnitsõn, Aleksander; Mihhailov, Dmitri; Sklyarov, Valery; Skliarova, IouliiaProceedings of IEEE East-West Design & Test Symposium (EWDTS’2012) : Kharkov, Ukraine, September 14–17, 20122012 / p. 38-41 Implementation of sorting algorithms in reconfigurable hardwareSkliarova, Iouliia; Sklyarov, Valery; Mihhailov, Dmitri; Sudnitsõn, Aleksander2012 IEEE Mediterranean Electrotechnical Conference (MELECON 2012) : Yasmine Hammamet, Tunisia, March 25-28, 20122012 / p. 107-110 : ill https://ieeexplore.ieee.org/document/6196391 Multilevel models for data processingSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 IEEE GCC Conference and Exhibition (GCC) : February 19-22, 2011, Dubai, United Arab Emirates2011 / p. 136-139 Optimization of address-based data sorting unit with external memory supportMihhailov, Dmitri; Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderCompSysTech'13 : proceedings of the 14th International Conference on Computer Systems and Technologies2013 / p. 83-90 : ill Optimization of FPGA-based circuits for recursive data sortingMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 129-132 : ill Optimization of recursive sorting algorithms for implementation in hardwareMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of 22nd International Conference on Microelectronics (ICM 2010) : Cairo, Egypt, Dec. 19-22, 20102010 / p. 471-474 : ill https://www.researchgate.net/publication/224213497_Optimization_of_recursive_sorting_algorithms_for_implementation_in_hardware Parallel FPGA-based implementation of recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) : Cancun, Mexico, December 13-15, 20102010 / p. 121-126 : ill https://www.researchgate.net/publication/221437230_Parallel_FPGA-Based_Implementation_of_Recursive_Sorting_Algorithms Performance evaluation for FPGA-based processing of tree-like structuresSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander19th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Sevilla, Spain, December 9-12, 20122012 / p. 217-220 : ill https://ieeexplore.ieee.org/document/6463762 Processing N-ary trees in hardware circuitsSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander13th International Symposium on Integrated Circuits (ISIC) : Singapore, 12-14 December 2011 : proceedings2011 / p. 262-265 : ill https://ieeexplore.ieee.org/document/6131946 Processing tree-like data structures for sorting and managing prioritiesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 IEEE Symposium on Computers & Informatics : ISCI 2011 : Kuala Lumpur, Malaysia, 20-23 March 20112011 / p. 322-327 https://www.researchgate.net/publication/252020117_Processing_tree-like_data_structures_for_sorting_and_managing_priorities Processing tree-like data structures in different computing platformsSklyarov, Valery; Skliarova, Iouliia; Oliveira, Ramiro; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 International Conference on Information and Computer Applications (ICICA 2011) : Dubai, United Arab Emirates, March 18-20, 20112011 / p. 112-116 : ill https://sweet.ua.pt/iouliia/Papers/2011/rp025_ICICA2011-A067.pdf Project-oriented approach to low-power topics in advanced digital design courseMihhailov, Dmitri; Sudnitsõn, Aleksander; Kruus, MargusElektronika ir elektrotechnika = Electronics and electrical engineering2010 / 6, p. 151-154 Recursion and hierarchy in digital design and prototyping : a case studyMihhailov, Dmitri; Kruus, Margus; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderComputer Systems and Technologies : 12th International Conference, CompSysTech'11 : Vienna, Austria, June 16-17, 2011 : proceedings2011 / p. 45-50 : ill https://dl.acm.org/doi/pdf/10.1145/2023607.2023616 Synthesis and implementation of hierarchical finite state machines with implicit modulesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) : Cancun, Mexico, December 13-15, 20102010 / p. 436-441 : ill https://www.researchgate.net/publication/221437255_Synthesis_and_Implementation_of_Hierarchical_Finite_State_Machines_with_Implicit_Modules Web-based tool for FSM encoding targeting low-power FPGA implementationMihhailov, Dmitri; Sudnitsõn, Aleksander; Tarletski, Konstantin2010 27th International Conference on Microelectronics : MIEL 2010 : Niš, Serbia, 16-19 May 2010 : proceedings2010 / p. 349-352 https://ieeexplore.ieee.org/document/5490468