Toggle navigation
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Databases
Publications
Searching
My bookmarks
0
https://doi.org/10.23658/taltech.33/2023
(DOI)
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
Add criteria
Advanced search
filter
Clear
×
types of item
book
..
journal article
..
newspaper article
..
book article
..
dissertation
..
Open Access
..
Scientific publications
..
year
year of publication
Loading..
author
Loading..
TalTech department
Loading..
subject term
Loading..
series
Loading..
name of the person
Loading..
keyword
Loading..
Clear
Number of records
1
Look more..
(0/0)
Export
export all inquiry results
(1)
Save TXT fail
Save PDF fail
print
Open for editing with marked entries
my bookmarks
display
Bibliographic view
Short view
sort
author ascending
author descending
year of publication ascending
year of publication descending
title ascending
title descending
1
dissertation
Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon
Imran, Malik
2023
https://www.ester.ee/record=b5571216*est
https://doi.org/10.23658/taltech.33/2023
https://digikogu.taltech.ee/et/Item/75aeb070-cb8b-4511-beaf-cbea3fca147d
https://www.ester.ee/record=b5571216*est
dissertation
Related publications
6
An experimental study of building blocks of lattice-based NIST post-quantum cryptographic algorithms
An open-source library of large integer polynomial multipliers
Design space exploration of SABER in 65nm ASIC
High-speed SABER key encapsulation mechanism in 65nm CMOS
A versatile and flexible multiplier generator for Large integer polynomials
High-speed design of postquantum cryptography with optimized hashing and multiplication
Number of records 1, displaying
1 - 1
×
match
starts with
ends with
containes
sort
Relevance
ascending
descending
year of publication
author
TalTech department
subject term
series
name of the person
keyword
Otsing
Valikud
0
year of publication
AND
OR
NOT
author
AND
OR
NOT
TalTech department
AND
OR
NOT
subject term
AND
OR
NOT
series
AND
OR
NOT
name of the person
AND
OR
NOT
keyword
AND
OR
NOT