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journal article
Logic IP for low-cost IC design in advanced CMOS nodes
Isgenc, Mehmet Meric
;
Martins, Mayler G.A.
;
Zackriya, V. Mohammed
;
Pagliarini, Samuel Nascimento
;
Pileggi, Larry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2020
/
p. 585-595
https://doi.org//10.1109/TVLSI.2019.2942825
journal article
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keyword
44
1.
layout patterns
2.
facilities layout
3.
Layout
4.
Layout planning
5.
Layout Synthesis
6.
layout-based effects
7.
space layout
8.
warehouse layout
9.
abstract syntax patterns
10.
airflow patterns
11.
analysis patterns
12.
archetype patterns
13.
archetypes and archetype patterns
14.
archetypes and archetype patterns based development
15.
budgeting patterns
16.
business archetypes and archetype patterns
17.
consumer load patterns
18.
Damage patterns
19.
demand patterns
20.
design patterns
21.
dive patterns
22.
dolphin patterns
23.
flow patterns
24.
human movement patterns
25.
identification patterns
26.
interaction patterns
27.
mining line patterns from event logs
28.
mining patterns from event logs
29.
model-based patterns
30.
moving patterns
31.
patterns
32.
polysemy patterns
33.
public behavior patterns
34.
religious patterns
35.
security patterns
36.
sequential patterns
37.
spatial patterns
38.
task knowledge patterns
39.
test patterns
40.
trends and patterns
41.
trigger-response patterns
42.
urban patterns
43.
user interface patterns
44.
3D surface patterns
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