• At-speed self-testing of high-performance pipe-lined processing architectures [Electronic resource]Gorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, Mart31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / p. 1-6 : ill [USB]
• Bringing research issues into lab scenarios on the example of SoC testing [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei; Wuttke, Heinz-DietrichInternational Conference on Engineering Education - ICEE 2007 : September 3-7, 2007, Coimbra, Portugal2007 / [7] p. : ill. [CD-ROM] http://icee2007.dei.uc.pt/proceedings/papers/429.pdf
• Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill https://doi.org/10.1016/j.micpro.2014.11.002 https://www.scopus.com/sourceid/15552 https://www.scopus.com/record/display.uri?eid=2-s2.0-84949774970&origin=inward&txGid=4e28bda483324ecfb9e44b95432f733b https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROPROCESS%20MICROSY&year=2015 https://www.webofscience.com/wos/woscc/full-record/WOS:000366879500030
• Parallel pseudo-exhaustive testing of array multipliers with data-controlled segmentationOyeniran, Adeboye Stephen; Azad, Siavoosh Payandeh; Ubar, Raimund-Johannes2018 IEEE International Symposium on Circuits and Systems (ISCAS) : 27-30 May 2018, Florence, Italy : proceedings2018 / 5 p.: ill https://doi.org/10.1109/ISCAS.2018.8350936 https://www.scopus.com/sourceid/56190 https://www.scopus.com/record/display.uri?eid=2-s2.0-85057101928&origin=inward&txGid=49e361500f6fe5902264fae2d90ceb95 https://www.webofscience.com/wos/woscc/full-record/WOS:000451218700050
• Replication-based deterministic testing of 2-dimensional arrays with highly interrelated cellsAzad, Siavoosh Payandeh; Oyeniran, Adeboye Stephen; Ubar, Raimund-Johannes21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems : DDECS 2018 : Budapest, Hungary 25-27 April, 2018 : proceedings2018 / p. 21-26 : ill https://doi.org/10.1109/DDECS.2018.00011
• Self-testing of pipe-lined signal processing architectures at-speedGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 25-28 : ill
• A tool set for teaching design-for-testability of digital circuitsKostin, Sergei; Orasson, Elmet; Ubar, Raimund-JohannesEWME 2016 : 11th European Workshop on Microelectronics Education : May 11-13, 2016, Southampton, UK2016 / [6] p. : ill https://doi.org/10.1109/EWME.2016.7496466