• AdAM: Adaptive Approximate Multiplier for Fault Tolerance in DNN AcceleratorsTaheri, Mahdi; Cherezova, Natalia; Nazari, Samira; Azarpeyvand, Ali; Ghasempouri, Tara; Daneshtalab, Masoud; Raik, Jaan; Jenihhin, MaksimIEEE transactions on device and materials reliability2024 / p. 66-75 : ill https://doi.org//10.1109/TDMR.2024.3523386
• AdAM: adaptive fault-tolerant approximate multiplier for edge DNN acceleratorsTaheri, Mahdi; Cherezova, Natalia; Nazari, Samira; Rafiq, Ahsan; Azarpeyvand, Ali; Ghasempouri, Tara; Daneshtalab, Masoud; Raik, Jaan; Jenihhin, Maksim2024 IEEE European Test Symposium (ETS): ETS 2024 : May 20-24, 2024, The Hague, Netherlands : proceedings2024 https://doi.org/10.1109/ETS61313.2024.10567161 https://www.scopus.com/sourceid/21100395950 https://www.scopus.com/record/display.uri?eid=2-s2.0-85197518684&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=DOI%2810.1109%2FETS61313.2024.10567161%29&sessionSearchId=2694adcfded71cf12565f4df31de58f5&relpos=0 https://www.webofscience.com/wos/woscc/full-record/WOS:001260970400008
• ADAssure : debugging methodology for autonomous driving control algorithmsRoberts, Andrew James; Heidari Iman, Mohammad Reza; Bellone, Mauro; Ghasempouri, Tara; Raik, Jaan; Maennel, Olaf Manuel; Hamad, Mohammad; Steinhorst, Sebastian2024 Design, Automation & Test in Europe Conference & Exhibition (DATE) : proceedings2024 / p. 1-6 https://doi.org/10.23919/DATE58400.2024.10546519
• Adjustable self-healing methodology for accelerated functions in heterogeneous systemsRiazati, Mohammad; Ghasempouri, Tara; Daneshtalab, Masoud; Raik, Jaan; Sjodin, Mikael; Lisper, Bjorn2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / p. 638-645 https://doi.org/10.1109/DSD51259.2020.00104
• An automatic approach to evaluate assertions' quality based on data-mining metricsGhasempouri, Tara; Niazmand, Behrad; Raik, JaanProceedings 2nd IEEE International Test Conference in Asia : ITC-Asia 2018, 15-17 August 2018, Harbin, China2018 / p. 61-66 : ill https://doi.org/10.1109/ITC-Asia.2018.00021
• Anomalous File System Activity detection through Temporal Association rule miningReza, M.; Iman, H.; Chikul, Pavel; Jervan, Gert; Bahsi, Hayretdin; Ghasempouri, TaraProceedings of the 9th International Conference on Information Systems Security and Privacy ICISSP. Vol. 12023 / p. 733-740 https://doi.org//10.5220/0000168400003405
• ARTmine : automatic association rule mining with temporal behavior for hardware verificationHeidari Iman, Mohammad Reza; Jervan, Gert; Ghasempouri, Tara2024 Design, Automation & Test in Europe Conference & Exhibition (DATE) : Valencia, Spain, 25-27 March 2024 : proceedings2024 / p. 1-6 : ill https://ieeexplore.ieee.org/document/10546742
• An automated method for mining high-quality assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, TaraMicroprocessors and microsystems2023 / art. 104773 https://doi.org/10.1016/j.micpro.2023.104773 https://www.scopus.com/sourceid/15552 https://www.scopus.com/record/display.uri?eid=2-s2.0-85146842129&origin=inward&txGid=c7a7060dbe54a8d7b2981d8e5878877f https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROPROCESS%20MICROSY&year=2023 https://www.webofscience.com/wos/woscc/full-record/WOS:000926500700001
• CLD : an accurate, cost-effective and scalable run-time Cache Leakage DetectorShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : Vienna, Austria, 07-09 April 20212021 / p. 127-132 : ill https://doi.org/10.1109/DDECS52668.2021.9417071
• Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemideleHariharan, Ranganathan2019 https://digi.lib.ttu.ee/i/?12854 https://www.ester.ee/record=b5243161*est
• Design understanding : from logic to specificationFey, Goerschwin; Ghasempouri, Tara; Jacobs, Swen; Raik, JaanProceedings of the 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 8-10, 2018, Verona, Italy2018 / p. 172–175 : ill https://doi.org/10.1109/VLSI-SoC.2018.8644732
• Efficient and effective association rule mining on big data and cloud technology : a multifaceted analysis = Tõhus ja efektiivne assotsiatsioonireeglite kaevandamine suurandmetel ja pilvetehnoloogial : mitmekülgne analüüsShahin, Mahtab2024 https://www.ester.ee/record=b5701564*est https://digikogu.taltech.ee/et/Item/5cb16841-6d26-495f-88bb-5ae980bcd258 https://doi.org/10.23658/taltech.50/2024
• Engineering of an effective automatic dynamic assertion mining platformGhasempouri, Tara; Malburg, Jan; Danese, Alessandro; Pravadelli, Graziano; Fey, Goerschwin; Raik, JaanVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 111-116 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920331
• Enhancing assertion-based verification in hardware designs through data mining algorithms = Andmekaeve algoritmide kasutamine riistvarasüsteemide väidete-põhise verifitseerimise parendamiseksHeidari Iman, Mohammad Reza2024 https://digikogu.taltech.ee/et/Item/622f3660-e890-454d-aa85-7cc505557f77 https://doi.org/10.23658/taltech.37/2024 https://www.ester.ee/record=b5694015*est
• Exploring factors in a crossroad dataset using cluster-based association rule miningShahin, Mahtab; Heidari Iman, Mohammad Reza; Kaushik, Minakshi; Sharma, Rahul; Ghasempouri, Tara; Draheim, DirkProcedia computer science2022 / p. 231-238 : ill https://doi.org/10.1016/j.procs.2022.03.032 https://www.scopus.com/sourceid/19700182801 https://www.scopus.com/record/display.uri?eid=2-s2.0-85132188116&origin=inward&txGid=2f2ed8feec1196d5f8ec3b79fcee4c88
• FORTUNE: A Negative Memory Overhead Hardware-Agnostic Fault TOleRance TechniqUe in DNNsNazari, Samira; Taheri, Mahdi; Azarpeyvand, Ali; Afsharchi, Mohsen; Ghasempouri, Tara; Herglotz, Christian; Daneshtalab, Masoud; Jenihhin, Maksim2024 IEEE 33rd Asian Test Symposium (ATS)2024 / p. 1-6 : ill https://doi.org//10.1109/ATS64447.2024.10915463
• From RTL liveness assertions to cost-effective hardware checkersHariharan, Ranganathan; Ghasempouri, Tara; Niazmand, Behrad; Raik, JaanXXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings2018 / 6 p. : ill https://doi.org/10.1109/DCIS.2018.8681487
• A hierarchical approach for devising area efficient concurrent online checkersNiazmand, Behrad; Azad, Siavoosh Payandeh; Ghasempouri, Tara; Raik, Jaan; Jervan, GertProceedings 2nd IEEE International Test Conference in Asia : ITC-Asia 2018, 15-17 August 2018, Harbin, China2018 / p. 139-144 : ill https://doi.org/10.1109/ITC-Asia.2018.00034
• IMMizer : an innovative cost-effective method for minimizing assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jervan, Gert; Ghasempouri, Tara2022 25th Euromicro Conference on Digital System Design (DSD) : Maspalomas, Spain 2022 : proceedings2022 / p. 671 - 678 https://doi.org/10.1109/DSD57027.2022.00095 https://www.scopus.com/record/display.uri?eid=2-s2.0-85146731802&origin=resultslist&sort=plf-f&src=s&sid=3b42bc15325c13282d3a40f32ea9fcd1&sot=b&sdt=b&s=TITLE-ABS-KEY%28%22immizer%3A+an+innovative%22%29&sl=34&sessionSearchId=3b42bc15325c13282d3a40f32ea9fcd1 https://www.webofscience.com/wos/woscc/full-record/WOS:000946536500080
• Leveraging Large Language Models for IoT Applications : A Maritime Image Dataset PerspectiveShahin, Mahtab; Rahimpour, Saeed; Ghasempouri, Tara; Kujalai, Pentti; Bauk, Sanja10th International Conference On Smart And Sustainable Technologies2025
• LiD-CAT: A lightweight detector for cache ATtacksReinbrecht, Cezar; Hamdioui, Said; Taouil, Mottaqiallah; Niazmand, Behrad; Ghasempouri, Tara; Raik, Jaan; Sepulveda, Johanna2020 IEEE European Test Symposium (ETS) : ETS 2020, May 25-29, 2020 Tallinn, Estonia : proceedings2020 / 6 p. : ill https://doi.org/10.1109/ETS48528.2020.9131603
• Meteorological Insights : Scalable Weather Pattern Mining in Tallinn and TartuShahin, Mahtab; Ghasempouri, Tara; Aznar Poveda, Juan; Janatian, Nasim; Fahringer, Thomas; Attique Shah, Syed; Draheim, Dirk2025 / 10 p.
• A methodology for automated mining of compact and accurate assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, Tara2021 IEEE Nordic Circuits and Systems Conference (NorCAS) : Oslo, Norway, October 26-272021 / 7 p. : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9599865 https://doi.org/10.1109/NorCAS53631.2021.9599865
• NV-SP: A new high performance and low energy NVM-Based scratch padShalabi, Ameer; Paul, Kolin; Ghasempouri, Tara; Raik, Jaan2020 IEEE Computer Society Annual Symposiumon VLSI : ISVLSI 2020, 6–8 July 2020, Limassol, Cyprus2020 / art. 19876866, p. 54−59 https://doi.org/10.1109/ISVLSI49217.2020.00020
• On the use of defensive schemes for hardware security = Kaitseskeemid riistvara turvalisuse tagamiseksEslami, Mohammad2024 https://www.ester.ee/record=b5701420*est https://doi.org/10.23658/taltech.53/2024 https://digikogu.taltech.ee/et/Item/068530be-4810-4489-9604-fb838d298b45
• Orchestration of serverless functions for scalable association rule mining with ApolloShahin, Mahtab; Janatian, Nasim; Poveda, Juan Aznar; Fahringer, Thomas; Ghasempouri, Tara; Shah, Syed Attique; Draheim, Dirktechrxiv.org2024 / 20 p https://doi.org//10.36227/techrxiv.172101151.16682756/v1
• Performance of a distributed apriori algorithm using the serverless functions of the Apollo frameworkShahin, Mahtab; Shah, Syed Attique; Sharma, Rahul; Ghasempouri, Tara; Poveda, Juan Aznar; Fahringer, Thomas; Draheim, DirkMachine Learning Methods in Systems : proceedings of 13th Computer Science On-line Conference 20242024 / 12 p https://link.springer.com/book/9783031705946 https://doi.org/10.1007/978-3-031-70595-3_37 https://www.scopus.com/sourceid/21100901469 https://www.scopus.com/record/display.uri?eid=2-s2.0-85208608005&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=ALL%28%22Performance+of+a+distributed+apriori+algorithm+using+the+serverless+functions+of+the+Apollo+framework%22%29&sessionSearchId=a1950993a8713b95c4defac4e2fbf8c1&relpos=1 https://www.webofscience.com/wos/woscc/full-record/WOS:001437390900037
• Processor vulnerability detection with the aid of assertions : RISC-V case studyHeidari Iman, Mohammad Reza; Ahmadi-Pour, Sallar; Drechsler, Rolf; Ghasempouri, Taratechrxiv.org2024 / p. 1-8 : ill https://doi.org/10.36227/techrxiv.172101134.45466090/v1
• Reusing verification assertions as security checkers for Hardware Trojan detectionEslami, Mohammad; Ghasempouri, Tara; Pagliarini, Samuel Nascimento2022 23rd International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA : 06-07 April 20222022 / p. 1-6 : ill https://doi.org/10.1109/ISQED54688.2022.9806292
• RTL assertion mining with automated RTL-to-TLM abstractionGhasempouri, Tara; Danese, Alessandro; Pravadelli, Graziano; Bombieri, Nicola; Raik, JaanProceedings of the 2019 Forum on specification & Design Languages (FDL)2019 / 8 p. : ill https://doi.org/10.1109/FDL.2019.8876941
• SCAAT: Secure cache alternative address table for mitigating cache logical side-channel attacksShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / art, 20035366, p. 213−217 https://doi.org/10.1109/DSD51259.2020.00043
• SCARF : securing chips with a robust framework against fabrication-time hardware trojansEslami, Mohammad; Ghasempouri, Tara; Pagliarini, Samuel NascimentoIEEE Transactions on Computers2024 / p. 2761-2775 https://doi.org/10.1109/TC.2024.3449082 https://www.scopus.com/sourceid/25033 https://www.scopus.com/record/display.uri?eid=2-s2.0-85201752061&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=TITLE-ABS-KEY%28%22SCARF%3A+Securing+Chips+With+a+Robust+Framework+Against+Fabrication-Time+Hardware+Trojans%22%29&sessionSearchId=7f45e0ec132af76c064c755f1de85733&relpos=0 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20T%20COMPUT&year=2023 https://www.webofscience.com/wos/woscc/full-record/WOS:001351576000009
• SCARF : securing chips with a robust framework against fabrication-time hardware Trojans : preprintEslami, Mohammad; Ghasempouri, Tara; Pagliarini, Samuel NascimentoarXiv.org2024 / 14 p. : ill https://doi.org/10.48550/arXiv.2402.12162
• A security verification template to assess cache architecture vulnerabilitiesGhasempouri, Tara; Raik, Jaan; Paul, Kolin; Reinbrecht, Cezar; Hamdioui, Said; Taouil, M.2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 22nd – 24th 2020 Novi Sad, Serbia : Proceedings2020 / art. 9095707, 6 p https://doi.org/10.1109/DDECS50862.2020.9095707
• Significant factors extraction : a combined logistic regression and apriori association rule mining approachShahin, Mahtab; Burtl, Markus; Heidari Iman, Mohammad Reza; Ghasempouri, Tara; Sharma, Rahul; Shah, Syed Attique; Draheim, DirkMachine Learning Methods in Systems : proceedings of 13th Computer Science On-line Conference 2024 ; Vol. 42024 / p. 295-311 https://link.springer.com/book/9783031705946 https://doi.org/10.1007/978-3-031-70595-3_30 https://www.scopus.com/sourceid/21100901469 https://www.scopus.com/pages/publications/85208622501?inward https://www.webofscience.com/wos/woscc/full-record/WOS:001437390900030
• Survey on architectural attacks : a unified classification and attack modelGhasempouri, Tara; Raik, Jaan; Reinbrecht, Cezar; Hamdioui, Said; Hamdioui, SaidACM Computing Surveys2023 / art. 42 https://doi.org/10.1145/3604803 https://www.scopus.com/sourceid/23038 https://www.scopus.com/record/display.uri?eid=2-s2.0-85174677921&origin=resultslist&sort=plf-f&src=s&sid=5017a1c9d633ac6f0480b4ae72b5920a&sot=b&sdt=b&s=TITLE-ABS-KEY%28%22Survey+on+Architectural+Attacks%3A+A+Unified+Classification+and+Attack+Model%22%29&sl=91&sessionSearchId=5017a1c9d633ac6f0480b4ae72b5920a&relpos=0 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=ACM%20COMPUT%20SURV&year=2023 https://www.webofscience.com/wos/woscc/full-record/WOS:001085637600017
• Zero-memory-overhead clipping-based fault tolerance for LSTM deep neural networksParchekani, Bahram; Nazari, Samira; Ahmadilivani, Mohammad Hasan; Azarpeyvand, Ali; Raik, Jaan; Ghasempouri, Tara; Daneshtalab, Masoud37th IEEE International Symposium on Defect and Fault Tolerancein VLSI and Nanotechnology Systems, Harwell, Oxfordshire, Didcot, UK, October 8th - 10th, 20242024 / 4 p. : ill https://doi.org/10.1109/DFT63277.2024.10753533 https://www.scopus.com/sourceid/21101123252 https://www.scopus.com/record/display.uri?eid=2-s2.0-85212407196&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=ALL%28%22Zero-Memory-Overhead+Clipping-Based+Fault+Tolerance+for+LSTM+Deep+Neural+Networks%22%29&sessionSearchId=fd90d0e9983d9a88c6a21e7c6aafecbb&relpos=0
• Towards multidimensional verification : where functional meets non-functionalJenihhin, Maksim; Lai, Xinhui; Ghasempouri, Tara; Raik, Jaan2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore2018 / 7 p. : ill https://doi.org/10.1109/NORCHIP.2018.8573495
• Towards smarter maritime security : Apriori algorithm optimization in serverless environmentsShahin, Mahtab; Rahimpour, Saeed; Ghasempouri, Tara; Bauk, Sanja; Fahringer, Tara; Draheim, DirkProcedia computer science2025 / p. 1 - 8 https://scholar.google.com/citations?view_op=view_citation&hl=en&user=9AGg5vkAAAAJ&cstart=20&pagesize=80&citation_for_view=9AGg5vkAAAAJ:-f6ydRqryjwC
• Understanding multidimensional verification : where functional meets non-functionalLai, Xinhui; Balakrishnan, Aneesh; Lange, Thomas; Jenihhin, Maksim; Ghasempouri, Tara; Raik, Jaan; Alexandrescu, DanMicroprocessors and microsystems2019 / art. 102867, 13 p. : ill https://doi.org/10.1016/j.micpro.2019.102867 https://www.scopus.com/sourceid/15552 https://www.scopus.com/record/display.uri?eid=2-s2.0-85071020969&origin=inward&txGid=87d2f90199a10d44d941b14d594d2f30 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROPROCESS%20MICROSY&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:000500052000047
• Verifying cache architecture vulnerabilities using a formal security verification flowGhasempouri, Tara; Raik, Jaan; Paul, Kolin; Reinbrecht, Cezar; Hamdioui, Said; Taouil, MottaqiallahMicroelectronics reliability2021 / art. 114085 https://doi.org/10.1016/j.microrel.2021.114085 https://www.scopus.com/sourceid/26717 https://www.scopus.com/record/display.uri?eid=2-s2.0-85102872009&origin=inward&txGid=bbbec1675d4df7951ad6c8a70f214a97 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROELECTRON%20RELIAB&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:000637756900007