Hardware trojan insertion in finalized layouts : from methodology to a silicon demonstration
Perez, Tiago Diadami
;
Pagliarini, Samuel Nascimento
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2023
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p. 2094-2107
https://doi.org/10.1109/TCAD.2022.3223846
https://www.scopus.com/sourceid/27724
https://www.scopus.com/record/display.uri?eid=2-s2.0-85144011739&origin=resultslist&sort=plf-f&src=s&sid=f6bea21f940b112407e8b3b930cd5a56&sot=b&sdt=b&s=DOI%2810.1109%2FTCAD.2022.3223846%29&sl=141&sessionSearchId=f6bea21f940b112407e8b3b930cd5a56
https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20T%20COMPUT%20AID%20D&year=2022
https://www.webofscience.com/wos/woscc/full-record/WOS:001017411600002
Split-chip design to prevent IP reverse engineering
Pagliarini, Samuel Nascimento
;
Sweeney, Joseph
;
Mai, Ken
;
Blanton, Shawn
;
Mitra, Subhasish
;
Pileggi, Larry
IEEE Design and Test
2020
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p. 109-118
https://doi.org/10.1109/MDAT.2020.3033255
https://www.scopus.com/sourceid/21100286806
https://www.scopus.com/record/display.uri?eid=2-s2.0-85095985466&origin=inward&txGid=5cd9b065fa2590c9dd1c7c529d74978c
https://jcr.clarivate.com/jcr-jp/journal-profile?journal=IEEE%20DES%20TEST&year=2022
https://www.webofscience.com/wos/woscc/full-record/WOS:000678331400021