• Verifying cache architecture vulnerabilities using a formal security verification flowGhasempouri, Tara; Raik, Jaan; Paul, Kolin; Reinbrecht, Cezar; Hamdioui, Said; Taouil, MottaqiallahMicroelectronics reliability2021 / art. 114085 https://doi.org/10.1016/j.microrel.2021.114085 https://www.scopus.com/sourceid/26717 https://www.scopus.com/record/display.uri?eid=2-s2.0-85102872009&origin=inward&txGid=bbbec1675d4df7951ad6c8a70f214a97 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROELECTRON%20RELIAB&year=2022 https://www.webofscience.com/wos/woscc/full-record/WOS:000637756900007