• Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill https://doi.org/10.1016/j.micpro.2012.11.004 https://www.scopus.com/sourceid/15552 https://www.scopus.com/record/display.uri?eid=2-s2.0-84878621727&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=DOI%2810.1016%2Fj.micpro.2012.11.004%29&sessionSearchId=81bea3cc7c86d66922f228affe5df51e https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROPROCESS%20MICROSY&year=2013 https://www.webofscience.com/wos/woscc/full-record/WOS:000324667900012
• Combining dynamic slicing and mutation operators for ESL correctionRepinski, Urmas; Hantson, Hanno; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesProceedings : 2012 17th IEEE European Test Symposium (ETS) : May 28th-June 1st, 2012, Annecy, France2012 / [6] p. : ill https://ieeexplore.ieee.org/document/6233020
• Comparison of model-based error localization algorithms for C designsRepinski, Urmas; Raik, JaanProceedings of IEEE East-West Design & Test Symposium (EWDTS’2012) : Kharkov, Ukraine, September 14–17, 20122012 / p. 42-45 https://ieeexplore.ieee.org/document/6673203
• Design error diagnosis using backtrace algorithm on decision diagramsRepinski, Urmas; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, AntonInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / p. 93-96
• Diagnosis and correction of multiple design errors using critical path tracing and mutation analysisHantson, Hanno; Repinski, Urmas; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-JohannesLATW 2012 : 13th IEEE Latin-American Test Workshop proceedings : April 10th-13th, 2012, Quito, Ecuador2012 / [6 p.] : ill https://ieeexplore.ieee.org/document/6261234
• FoREnSiC– an automatic debugging environment for C programsBloem, Roderick; Raik, Jaan; Repinski, UrmasEighth Haifa Verification Conference : HVC 2012 : November 6-8, Haifa, Israel : [proceedings]2013 / p. 260-265 : ill https://doi.org/10.1007/978-3-642-39611-3_24 https://www.scopus.com/sourceid/25674 https://www.scopus.com/record/display.uri?eid=2-s2.0-84880729810&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=DOI%2810.1007%2F978-3-642-39611-3_24%29&sessionSearchId=34385ac6d8e7d4f5a83143ddce81b33e
• High-level decision diagram simulation for diagnosis and soft-error analysisRaik, Jaan; Repinski, Urmas; Jenihhin, Maksim; Chepurov, AntonDesign and test technology for dependable systems-on-chip2011 / p. 294-309 : ill https://www.igi-global.com/chapter/high-level-decision-diagram-simulation/51406
• High-level design error diagnosis using backtrace on decision diagramsRaik, Jaan; Repinski, Urmas; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, Anton28th Norchip Conference : Tampere, Finland, 15-16 November 2010 : conference program and papers2010 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2010.5669486
• Model-based verification with error localization and error correction for C designsRepinski, UrmasПрограммные продукты и системы = Programmnye produkty i sistemy = Software & systems2012 / p. 221-229 : ill
• Верификация на основе симуляции с нахождением и исправлением ошибок для С-дизайновRepinski, UrmasПрограммные продукты и системы = Programmnye produkty i sistemy = Software & systems2012 / с. 229-237 : ил