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• New fault models and self-test generation for microprocessors using High-Level Decision DiagramsJasnetski, Artjom; Raik, Jaan; Tšertov, Anton; Ubar, Raimund-Johannes2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings2015 / p. 251-254 : ill
• Software-based self-test generation for microprocessors with high-level decision diagramsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, Anton; Brik, MarinaProceedings of the Estonian Academy of Sciences2014 / p. 48-61 : ill https://artiklid.elnet.ee/record=b2665215*est https://doi.org/10.3176/proc.2014.1.08 https://www.scopus.com/sourceid/11500153303 https://www.scopus.com/record/display.uri?eid=2-s2.0-84896037171&origin=inward&txGid=7473dadb0a18cc135d0d2cd39937c21d https://jcr.clarivate.com/jcr-jp/journal-profile?journal=P%20EST%20ACAD%20SCI&year=2014 https://www.webofscience.com/wos/woscc/full-record/WOS:000333322100008
• Software-based self-test generation for microprocessors with high-level decision diagramsUbar, Raimund-Johannes; Tšertov, Anton; Jasnetski, Artjom; Brik, MarinaLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill
• Teaching digital system testOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Kruus, MargusThe 27th EAEEIE Annual Conference : June 7-9, 2017, Grenoble2017 / [6] p