System level power-performance trade-offs in embedded systems using voltage and frequency scaling of off-chip buses and memory
autor
Puttaswamy, Kiran
Choi, Kyu-Won
Park, Jun Cheol
Mooney III, Vincent J.
Chatterjee, Abhijit
Ellervee, Peeter
vastutusandmed
Kiran Puttaswamy, Kyu-Won Choi, Jun Cheol Park, Vincent J.Mooney III, Abhijit Chatterjee and Peeter Ellervee
allikas
ISSS'02, October 2-4, 2002, Kyoto, Japan
ilmumisaasta
2002
leheküljed
p. 225-230 : ill
leitav
https://ieeexplore.ieee.org/document/1227182
märksõna
manussüsteemid
integraallülitused
projekteerimine
optimeerimine
märkused
Bibliogr.: 20 ref
keel
inglise