FPGA design flow with automated test generation
autor
Elst, G.
Diener, Karl-Heinz
Ivask, Eero
Raik, Jaan
Ubar, Raimund-Johannes
vastutusandmed
G.Elst, K.-H.Diener, E.Ivask, J.Raik, R.Ubar
allikas
Proc. of German 11th Workshop on Test Technology and Reliability of Circuits and Systems : Potsdam, 1999
ilmumiskoht
[S.l.]
ilmumisaasta
1999
leheküljed
p. 120-123
keel
inglise