prindi

Logic-based implementation of fault-tolerant routing in 3D Network-on-Chips

autor
Niazmand, Behrad
Azad, Siavoosh Payandeh
Flich, Jose
Raik, Jaan
Jervan, Gert
Hollstein, Thomas
vastutusandmed
Behrad Niazmand, Siavoosh Payandeh Azad, Jose Flich, Jaan Raik, Gert Jervan, Thomas Hollstein
allikas
2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) : Nara, Japan, 31 August - 2 September 2016
ilmumiskoht
Piscataway
kirjastus/väljaandja
IEEE
ilmumisaasta
2016
leheküljed
[8] p. : ill
konverentsi nimetus, aeg
10th IEEE/ACM International Symposium on Networks-on-Chip, 31 August-2 September, 2016
konverentsi toimumispaik
Nara, Japan
leitav
https://doi.org/10.1109/NOCS.2016.7579317
märksõna
kiipvõrgud
rikked
tolerantsid
võtmesõna
fault-tolerance
routing algorithm
reconfigurability
reliability
network-on-chip
ISBN
978-1-4673-9030-9
märkused
Bibliogr.: 25 ref
TTÜ struktuuriüksus
arvutitehnika instituut
keel
inglise
Niazmand, B., Azad, S.P., Flich, J., Raik, J., Jervan G., Hollstein, T. Logic-based implementation of fault-tolerant routing in 3D Network-on-Chips // 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) : Nara, Japan, 31 August - 2 September 2016. Piscataway : IEEE, 2016. [8] p. : ill. https://doi.org/10.1109/NOCS.2016.7579317