The validation of graph model-based, gate level low-dimensional feature data for machine learning applications

vastutusandmed
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
ilmumiskoht
Danvers
kirjastus/väljaandja
ilmumisaasta
leheküljed
7 p
konverentsi nimetus, aeg
2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019
konverentsi toimumispaik
Helsinki, Finland
ISBN
978-1-7281-2769-9
märkused
Bibliogr.: 11 ref
TTÜ struktuuriüksus
keel
inglise
Balakrishnan, A., Lange, T., Glorieux, M., Alexandrescu, D., Jenihhin, M. The validation of graph model-based, gate level low-dimensional feature data for machine learning applications // 2019 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019, Helsinki, Finland : proceedings in IEEE Xplore. Danvers : IEEE, 2019. 7 p. https://doi.org/10.1109/NORCHIP.2019.8906974