Ultra-low latency NoC testing via pseudo-random test pattern compaction

autor
Tatenguem, Herve
vastutusandmed
Herve’ Tatenguemy, ... Vineeth Govind, Jaan Raik, ... [et al.]
allikas
SoC 2012 : International Symposium on System-on-Chip 2012 : Tampere, Finland, October 11-12, 2012
ilmumiskoht
[S.l.]
kirjastus/väljaandja
ilmumisaasta
leheküljed
6 p. : ill
konverentsi nimetus, aeg
International Symposium on System-on-Chip, October 10-12, 2012
konverentsi toimumispaik
Tampere, Finland
ISBN
978-1-4673-2896-8
märkused
Bibliogr.: 22 ref
keel
inglise
Tatenguem, H., Govind, V., Raik, J. et al. Ultra-low latency NoC testing via pseudo-random test pattern compaction // SoC 2012 : International Symposium on System-on-Chip 2012 : Tampere, Finland, October 11-12, 2012. [S.l.] : IEEE, 2012. 6 p. : ill. https://ieeexplore.ieee.org/document/6376370