A new evolutionary-technique-based approach to optimize pseudo-random TPG for logic BISTJutman, Artur; Aleksejev, Jevgeni; Ubar, Raimund-JohannesMEET/MARIND'2002 : proceedings of First International Congress on Mechanical and Electrical Engineering and Technology and Fourth International Conference on Marine Industry, 07-11 October 2002, Varna Bulgaria. Volume 12002 / p. 247-252 : ill

A novel artificial neural networks based automatic adaptive fault detection technique for analog circuitsPetlenkov, Eduard; Jutman, Artur; Nõmm, Sven; Ubar, Raimund-JohannesBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 167-170 : ill

A scalable static test set compaction method for sequential circuitsAleksejev, Igor; Raik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesProceedings of the 9th IEEE Latin-American Test Workshop : LATW2008 : February 17-20, 2008, Puebla, Mexico2008 / p. 87-92 : ill

A system for teaching basic and advanced topics of IEEE 1149.1 boundary scan standard (extended abstract)Jutman, Artur; Rosin, Vjatšeslav; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichProceedings of 16th EAEEIE Conference on Innovation in Education for Electrical and Information Engineering (EIE) : Lappeenranta, Finland, 6th-8th June 20052005 / [2] p. : ill

A tool for advanced learning of LFSR-based testing principlesJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 175-178 : ill

A tool for teaching pseudo-random TPG principlesJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesProceedings of the 17th EAEEIE Annual Conference on Innovation in Education for Electrical and Information Engineering : Craiova, Romania, June 1st-3rd, 20062006 / p. 182-187 : ill

An educational environment for digital testing : hardware, tools, and web-based runtime platformJutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes; Vislogubov, VladislavProceedings : DSD'2005 : 8th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : Porto, Portugal, August 30 - September 3, 20052005 / p. 412-419 : ill

Analysis of a test method for delay faults in NoC interconnectsBengtsson, Tomas; Jutman, Artur; Kumar, Shashi; Ubar, Raimund-Johannes; Peng, ZeboProceedings of the IEEE East-West Design & Test Workshop (EWDTW'06) : Sochi, Russia, September 15-19, 20062006 / p. 42-46 : ill

Applets for learning digital design and test [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Kruus, Margus; Wuttke, Heinz-Dietrich1st International Conference on Interactive Mobile and Computer Aided Learning (IMCL2006) : Amman, Jordan, April 19-21, 20062006 / p. 1-4 : ill. [CD-ROM]

Application of sequential test set compaction to LFSR reseedingAleksejev, Igor; Jutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes26th Norchip Conference : Tallinn, Estonia, 17-18 November 2008 : formal proceedings2008 / p. 102-107 : ill http://dx.doi.org/10.1109/NORCHP.2008.4738292

Application of structurally synthesized binary decision diagrams for timing simulation of digital circuitsJutman, Artur; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering2001 / 4, p. 269-288 : ill

Assessment of student's design results in e-learning-scenarios [Electronic resource]Wuttke, Heinz-Dietrich; Ubar, Raimund-Johannes; Henke, Karsten; Jutman, Artur8th International Conference on Technology Based Higher Education and Training : 10th to 13th July, 2007, KKR Hotel Kumamoto, Kumamoto, Japan : [proceedings]2007 / [6] p. [CD-ROM]

Asynchronous e-learning resources for hardware design issuesJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichProceedings of the International Conference on Computer Systems and Technologies (e-learning) : CompSysTech'04 : Rousse, Bulgaria, 17-18 June2004 / p. IV.11-1 - IV.11-6 : ill https://www.researchgate.net/publication/234797327_Asynchronous_e-learning_resources_for_hardware_design_issues

Asynchronous fault detection in IEEE P1687 instrument networkShibin, Konstantin; Devadze, Sergei; Jutman, ArturIEEE 23rd North Atlantic Test Workshop : 14-16 May 2014, Binghampton, New York : proceedings2014 / p. 73-78 : ill

At-speed on-chip diagnosis of board-level interconnect faultsJutman, ArturNinth IEEE European Test Symposium : ETS 2004 : 23-26 May 2004, Corsica, France : proceedings2004 / p. 2-7 : ill https://www.researchgate.net/publication/4098807_At-speed_on-chip_diagnosis_of_board-level_interconnect_faults

Automatic SoC level test path synthesis based on partial functional modelsTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei2011 Asian Test Symposium (ATS) : New Delhi, India2011 / p. 532-538 https://ieeexplore.ieee.org/document/6114730

Automation of testing beyond the SoCsTšertov, Anton; Jutman, Artur; Devadze, SergeiInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 29-32 : ill

BASTION : board and SoC test instrumentation for ageing and no failure foundJutman, Artur; Lotz, Christophe; Larsson, Erik; Sonza Reorda, Matteo; Jenihhin, Maksim; Raik, JaanProceedings of the 2017 Design, Automation & Test in Europe (DATE) : 27-31 March 2017, Swisstech, Lausanne, Switzerland2017 / p. 115-120 : ill https://doi.org/10.23919/DATE.2017.7926968

BIST analyzer : a training platform for SoC testing [Electronic resource]Jutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich37th Annual Frontiers in Education Conference : Global Engineering : Knowledge Without Borders, Opportunities Without Passports : Milwaukee, Wisconsin, October 10-13, 20072007 / p. S3H-8-S3H-13 : ill. [CD-ROM] http://dx.doi.org/10.1109/FIE.2007.4418125

Bringing research issues into lab scenarios on the example of SoC testing [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei; Wuttke, Heinz-DietrichInternational Conference on Engineering Education - ICEE 2007 : September 3-7, 2007, Coimbra, Portugal2007 / [7] p. : ill. [CD-ROM] http://icee2007.dei.uc.pt/proceedings/papers/429.pdf

Calculation of LFSR seed and polynomial pair for BIST applicationsJutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 105-108 : ill

Calculation of LFSR seed and polynomial pair for BIST applications [Electronic resource]Jutman, Artur; Tšertov, Anton; Ubar, Raimund-Johannes2008 IEEE Design and Diagnostics of Electronic Circuits and Systems : Bratislava, Slovakia, April 16-18, 20082008 / p. 275-279 : ill. [CD-ROM]

CMOS defects analysis using DefSim measurement environmentPleskacz, Witold A.; Borejko, Tomasz; Walkanis, A.; Stopjakova, Viera; Jutman, Artur; Ubar, Raimund-JohannesInformal Digest of Papers : Eleventh IEEE European Test Symposium : ETS 2006 : 21-24 May 2006, Southampton, United Kingdom2006 / p. 241-246 : ill

CMS drift tubes sector collector relocation phase 1 upgrade [Electronic resource]Bedoya, C. F.; Jutman, Artur; Shibin, Konstantin; Devadze, Sergei2015 http://cms.cern.ch/iCMS/jsp/openfile.jsp?type=DN&year=2015&files=DN2015_011.pdf

DefSim - the defective ICPleskacz, Witold A.; Jutman, Artur; Ubar, Raimund-Johannes; Devadze, SergeiDATE 2007 : Design Automation and Test in Europe : Nice, France, April 16-20, 20072007 / p. s96 (2 p.)

DefSim: a remote laboratory for studying physical defects in CMOS digital circuitsPleskacz, Witold A.; Stopjakova, Viera; Borejko, Tomasz; Jutman, Artur; Walkanis, AndrzejIEEE transactions on industrial electronics2008 / 6, p. 2405-2415 : ill

DefSim: CMOS defects on chip for research and educationPleskacz, Witold A.; Borejko, Tomasz; Walkanis, A.; Stopjakova, Viera; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 74-79 : ill

DefSim: measurement environment for CMOS defectsBorejko, Tomasz; Jutman, Artur; Pleskacz, Witold A.; Ubar, Raimund-Johannes2006 25th International Conference on Microelectronics : Belgrade, Serbia and Montenegro, 14-17 May 2006 : proceedings. Volume 22006 / p. 679-682 https://ieeexplore.ieee.org/document/1651048

DefSim-based exercises for studying defects in CMOS gatesJutman, Artur; Pleskacz, Witold A.; Boiko, Nikolai; Ubar, Raimund-JohannesEWME 2006 proceedings : 6th International Workshop on Microelectronics Education : 8-9 June, 2006, Stockholm, Sweden2006 / p. 23-26 : ill

Delay testing of asynchronous NoC interconnectsBengtsson, Tomas; Jutman, Artur; Kumar, Shashi; Ubar, Raimund-JohannesProceedings of the 12th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2005 : Krakow, Poland, 22-25 June, 2005. Vol. 1 of 22005 / p. 419-424 : ill

Design error diagnosis in digital circuits with stuck-at fault modelJutman, Artur; Ubar, Raimund-JohannesMicroelectronics reliability2000 / 2, p. 307-320 : ill

Design error localization in digital circuits by stuck-at fault test patternsJutman, Artur; Ubar, Raimund-Johannes[MIEL] 2000 : 22nd International Conference on Microelectronics : Niš, Yugoslavia, 14-17 May 2000 : proceedings. Volume 22000 / p. 723-726

Designing reliable cyber-physical systemsAleksandrowicz, Gadi; Arbel, Eli; Bloem, Roderick; Devadze, Sergei; Jenihhin, Maksim; Jutman, Artur; Raik, Jaan; Shibin, KonstantinLanguages, design methods, and tools for electronic system design : selected contributions from FDL 20162018 / p. 15-38 : ill https://doi.org/10.1007/978-3-319-62920-9_2 Conference Proceedings at Scopus Article at Scopus

Designing reliable cyber-physical systems : overview associated to the special session at FDL'16Aleksandrowicz, Gadi; Arbel, Eli; Bloem, Roderick; Devadze, Sergei; Jenihhin, Maksim; Jutman, Artur; Raik, Jaan; Shibin, KonstantinThe 2016 Forum on Specification & Design Languages : proceedings : Bremen, Germany, September 14-16, 20162016 / [8] p. : ill https://doi.org/10.1109/FDL.2016.7880382

Diagnostic modeling of digital systems with multi-level decision diagramsUbar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Jenihhin, MaksimDesign and test technology for dependable systems-on-chip2011 / p. 92-118 : ill

Diagnostic modeling of microprocessors with high-level decision diagramsUbar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Jenihhin, Maksim; Brik, Marina; Istenberg, Martin; Wuttke, Heinz-DietrichBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 147-150 : ill

Diagnostic software with WEB interface for teaching purposesVislogubov, Vladislav; Jutman, Artur; Kruus, Helena; Orasson, Elmet; Raik, Jaan; Ubar, Raimund-JohannesBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 255-258 : ill

DIAGNOZER : a laboratory tool for teaching research in diagnosis of electronic systems [Electronic resource]Ubar, Raimund-Johannes; Kostin, Sergei; Jutman, Artur; Raik, Jaan; Wuttke, Heinz-Dietrich2009 IEEE International Conference on Microelectronic Systems Education MSE '09 : 25-27 July 2009, San Francisco, California : [proceedings]2009 / p. 12-15 : ill. [CD-ROM] http://dx.doi.org/10.1109/MSE.2009.5270842

Digital design learning system based on Java appletsJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes4th Annual Conference of the LTSN Centre for Information and Computer Sciences : 26th-28th August 2002, NUI Galway, Ireland2003 / p. 183-187 : ill

Digital electronics design and test at Computer Engineering Department of Tallinn University of TechnologyUbar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Ellervee, PeeterThe house magazine : the parlamentary weekly2006 / 1198, p. 42 : ill

Distance-learning tools for digital design and test issuesJutman, Artur; Kruus, Margus; Sudnitsõn, Aleksander; Ubar, Raimund-JohannesIT+SE'2002 : Information Tec[h]nologies in Science, Education, Telecommunication, Business : proceedings = Информационные технологии в науке, образовании, телекоммуникации, бизнесе, Украина, Крым, Ялта-Гурзуф, 20-30 мая 2002 года : труды2002 / p. 269-272 : ill

Effective scalable IEEE 1687 instrumentation network for fault managementJutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE design & test2013 / p. 26-35 : ill

Efficient at-speed interconnect BIST and diagnosis frameworkJutman, ArturInformal Digest of Papers : 10 IEEE European Test Symposium : Tallinn, Estonia, May 22-25, 20052005 / p. 257-258 : ill

Efficient single-pattern fault simulation on structurally synthesized BDDsRaik, Jaan; Ubar, Raimund-Johannes; Devadze, Sergei; Jutman, ArturDependable Computing - EDCC-5 : 5th European Dependable Computing Conference : Budapest, Hungary, April 20-22, 2005 : proceedings2005 / p. 332-344 : ill

Efficient TPG for a fast at-speed interconnect BIST [Electronic resource]Jutman, Artur7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems : April 18-21, 2004, Stará Lesná, Slovakia : proceedings2004 / p. 223-226 : ill. [CD-ROM]

E-learning environment for WEB-based study of testingUbar, Raimund-Johannes; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Jenihhin, Maksim; Aleksejev, Igor; Tšepurov, Anton; Tšertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, Heinz-DietrichProceedings of the 8th European Workshop on Microelectronics Education : EWME 2010 : Darmstadt, Germany, 10-12 May 20102010 / p. 47-52 : ill

E-learning environment in the area of digital microelectronicsJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichITHET 2004 : proceedings of the Fifth International Conference on Information Technology based Higher Education and Training : 31 May - 2 June, 2004, Istanbul, Turkey2004 / p. 278-283 : ill

E-learning tools for digital testDevadze, Sergei; Gorjachev, R.; Jutman, Artur; Orasson, Elmet; Rosin, Vjatšeslav; Ubar, Raimund-JohannesProc. III International Conference "Distance Learning - Educational Sphere of XXI Century" : Minsk, Belorussia, 20032003 / p. 336-342

E-learning tools for teaching self-test of digital electronicsJutman, Artur; Gramatova, Elena; Pikula, T.; Ubar, Raimund-Johannes15 EAEEIE International Conference on Innovation in Education for Electrical and Information Engineering : Sofia, Bulgaria, May 27-29, 20042004 / p. 267-272 : ill

Embedded instrumentation toolbox for screening marginal defects and outliers for productionOdintsov, Sergei; Jutman, Artur; Devadze, Sergei; Aleksejev, IgorIEEE AUTOTESTCON 2017 : Schaumburg, USA, Sept 11-14, 2017 : proceedings2017 / p. 336-334 : ill https://doi.org/10.1109/AUTEST.2017.8080516

Embedded synthetic instruments for board-level testingJutman, Artur; Devadze, Sergei; Aleksejev, Igor; Wenzel, ThomasProceedings : 2012 17th IEEE European Test Symposium (ETS) : May 28th–June 1st, 2012, Annecy, France2012 / 1 p. : ill

Exact static compaction of independent test sequencesRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesBEC 2002 : proceedings of the 8th Biennial Baltic Electronics Conference : October 6-9, 2002, Tallinn, Estonia2002 / p. 315-318 : ill

Exact static compaction of sequential circuit tests using branch-and-bound and search state registrationRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesETW'02 : 7th IEEE European Test Workshop, Gorfu Greece, May 26-29, 2002 : informal digest2002 / p. 19-20

Fast and efficient static compaction of test sequences based on greedy algorithmsRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesIEEE Design and Diagnostics of Electronic Circuits and Systems - IEEE DDECS 2001 : Fourth International Workshop on IEEE Design and Diagnostics of Electronic Circuits and Systems : Györ, Hungary, April 18-20, 20012001 / p. 117-122

Fast extended test access via JTAG and FPGAsDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-JohannesInternational Test Conference 2009 : November 1 - November 6, 2009, Austin Convention Center, Austin, Texas USA : proceedings2009 / p. 1-7 : ill http://dx.doi.org/10.1109/TEST.2009.5355668

Fast fault simulation for extended class of faults in scan-path circuitsUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, ArturProceedings : Fifth IEEE International Symposium on Electronic Design, Test and Applications : DELTA 2010 : 13-15 January 2010, Ho Chi Minh City, Vietnam2010 / p. 14-19

Fast static compaction of test sequences using implications and greedy searchRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesETW 2001 : IEEE European Test Workshop : Stockholm, May 29 June 1, 2001 : informal digest2001 / p. 207-209 : ill

Fast static compaction of tests composed of independent sequences : basic properties and comparison of methodsRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesThe 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume II2002 / p. 445-448 : ill http://dx.doi.org/10.1109/ICECS.2002.1046190

Fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, ArturProceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010) : 30 May - 2 June 2010, Paris, France2010 / p. 653-656 : ill

Fault management instrumentation network based on IEEE P1687 IJTAGShibin, Konstantin; Jutman, Artur; Devadze, SergeiEuropean Test Symposium (ETS), 2013, Avignon, France2013

Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDsDevadze, Sergei; Raik, Jaan; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 97-102 : ill

FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est

FPGA-based synthetic instrumentation for board testAleksejev, Igor; Jutman, Artur; Devadze, Sergei; Odintsov, Sergei; Wenzel, ThomasProceedings : International Test Conference 20122012 / p. 1-10 : ill

Functional test generation for finite state machinesUbar, Raimund-Johannes; Brik, Marina; Jutman, Artur; Raik, Jaan; Bengtsson, Tomas; Kumar, ShashiBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 205-208 : ill

Generic interconnect BIST for Network-on-ChipJutman, Artur; Ubar, Raimund-Johannes; Raik, JaanDDECS : 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems : April 13-16, 2005, Sopron, Hungary : proceedings2005 / p. 224-227 : ill

Handbook of testing electronic systemsNovak, Ondrej; Gramatova, Elena; Ubar, Raimund-Johannes; Jutman, Artur; Raik, Jaan2005 https://www.ester.ee/record=b2102523*est

Hardware/Software co-design in practice : MEMOCODE'08 contest experienceReinsalu, Uljana; Devadze, Sergei; Jutman, Artur; Tšertov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 55-58 : ill

Health management for self-aware SoCs based on IEEE 1687 infrastructureShibin, Konstantin; Devadze, Sergei; Jutman, Artur; Grabmann, Martin; Pricken, RobinIEEE Design & Test2017 / p. 27-35 : ill https://doi.org/10.1109/MDAT.2017.2750902

Hierarchical design error diagnosis in combinational circuits by stuck-at fault test patternsUbar, Raimund-Johannes; Jutman, ArturProceedings of the 6th International Conference on Mixed Design of Integrated Circuits and Systems : MIXDES'99 : Krakow, Poland, 17-19 June 19991999 / p. 437-442 : ill

HLS-based optimization of tau triggering algorithm for LHC: a case studyCherezova, Natalia; Mihhailov, Dmitri; Devadze, Sergei; Jutman, Artur2022 18th Biennial Baltic Electronics Conference (BEC)2022 / 6 p. : ill https://doi.org/10.1109/BEC56180.2022.9935599

IEEE 1687 compliant ecosystem for embedded instrumentation access and in-field health monitoringTšertov, Anton; Jutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE AUTOTESTCON 2018 : National Harbor, September 17-20, 2018 : proceedings2018 / 9 p.: ill https://doi.org/10.1109/AUTEST.2018.8532559

IEEE European Test Symposium (ETS)Eggersgluss, Stephan; Hamdioui, Said; Jutman, Artur; Michael, Maria K.; Raik, Jaan2019 IEEE International Test Conference (ITC)2019 / 4 p https://doi.org/10.1109/ITC44170.2019.9000148 Conference proceeding at Scopus Article at Scopus Article at WOS

IEEE P1687 IJTAG demonstrator on FPGAShibin, Konstantin; Aleksejev, Igor; Jutman, Artur; Devadze, SergeiDATE 2012 University Booth : Design Automation and Test in Europe : Dresden, Germany, March 12-16, 20122012 / 1 p. : ill

Improving the efficiency of timing simulation in digital circuits by using structurally synthesized BDDsUbar, Raimund-Johannes; Jutman, Artur; Peng, Z.IEEE Norchip Conference2000 / p. 254-261

Increasing the speed of delay simulation in digital circuitsUbar, Raimund-Johannes; Jutman, ArturThe 7th Biennial Conference on Electronics and Microsystem Technology "Baltic Electronics Conference" : BEC 2000 : October 8 - 11, 2000, Tallinn, Estonia : conference proceedings2000 / p. 31-34 : ill

In-system programming of non-volatile memories on microprocessor-centric boardsTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomInternational journal of microelectronics and computer science2014 / p. 25-34 : ill

Internet-based software for teaching test of digital circuitsUbar, Raimund-Johannes; Jutman, Artur; Orasson, Elmet; Raik, Jaan; Evartson, Teet; Wuttke, Heinz-DietrichMicroelectronics education : proceedings of the 4th European Workshop on Microelectronics Education : EWME 2002, Spain, May 23-24, 20022002 / p. 317-320 : ill

Invited paper: System-Wide Fault Management based on IEEE P1687 IJTAGJutman, Artur; Devadze, Sergei; Aleksejev, Jevgeni6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) : 20-22 June 2011, Montpeillier, France2011 / [4] p.: ill

Java applets support for an asynchronous-mode learning of digital design and testJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichITHET 2003 proceedings : 4th International Conference on Information Technology Based Higher Education and Training : July 7-9, 2003, Marrakech, Morocco2003 / p. 397-401 : ill

Java technology based training system for teaching digital design and testDevadze, Sergei; Jutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichBEC 2002 : proceedings of the 8th Biennial Baltic Electronics Conference : October 6-9, 2002, Tallinn, Estonia2002 / p. 283-286 : ill

Laboratory training for teaching design and test of digital circuitsJutman, Artur; Ubar, Raimund-JohannesProceedings of the 8th International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2001 : Zakopane, Poland, 21-23 June 20002001 / p. 521-524 : ill

Learning digital test and diagnostics via internetUbar, Raimund-Johannes; Jutman, Artur; Kruus, Margus; Orasson, Elmet; Devadze, Sergei; Wuttke, Heinz-DietrichInternational journal of online engineering2007 / 1, [9] p. : ill https://www.db-thueringen.de/servlets/MCRFileNodeServlet/dbt_derivate_00032681/iJOE_1681-1221_03_2007_1_361.pdf

Learning digital test and diagnostics via internet [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Kruus, Margus; Orasson, Elmet; Devadze, Sergei; Wuttke, Heinz-DietrichInternational journal of computing & information sciences2006 / 2, p. 86-96 : ill

LFSR polynomial and seed selection using genetic algorithmAleksejev, E.; Jutman, Artur; Ubar, Raimund-JohannesBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 179-182 : ill

Maagiline miljonipiir on peagi ületatud : [2003. a. ületab TTÜ Arengufondi ja Vilistlaskogu stipendiumide kogusumma 1 miljoni : stipendiumitunnistuste pidulikust kätteandmisest 7. nov. Tallinna Raekojas rohkem kui 30-le TTÜ stipendiaadile, ka vastavad küsimustele: Gunnar Okk, Artur Jutman ja Toomas Luman]Ummelas, Mart; Okk, Gunnar; Jutman, Artur; Luman, ToomasMente et Manu2002 / lk. 1 https://www.ester.ee/record=b1242496*est

Marginal PCB assembly defect detection on DDR3/4 memory busOdintsov, Sergei; Jutman, Artur; Devadze, Sergei2017 IEEE International Test Conference (ITC 2017) : Forth Worth, Texas, USA, 31 October - 2 November 20172017 / p. 238-247 : ill https://doi.org/10.1109/TEST.2017.8242070

A method for crosstalk fault detection in on-chip busesBengtsson, Tomas; Jutman, Artur; Ubar, Raimund-Johannes; Kumar, ShashiNorchip : proceedings : Oulu, Finland, 21-22 November 20052005 / p. 285-288 : ill https://doi.org/10.1109/NORCHP.2005.1597045

Microprocessor modeling for board level test access automationDevadze, Sergei; Jutman, Artur; Tšertov, Anton; Ubar, Raimund-JohannesProceedings of 10th IEEE Workshop on RTL and High Level Testing : Hong Kong, November 27-28, 20092009 / ? p

Microprocessor-based system test using debug interfaceDevadze, Sergei; Jutman, Artur; Tšertov, Anton; Instenberg, Martin; Ubar, Raimund-Johannes26th Norchip Conference : Tallinn, Estonia, 17-18 November 2008 : formal proceedings2008 / p. 98-101 : ill http://dx.doi.org/10.1109/NORCHP.2008.4738291

Modeling microprocessor faults on high-level decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Jenihhin, Maksim; Istenberg, Martin; Wuttke, Heinz-DietrichDSN 2008 : supplemental : 2008 IEEE International Conference on Dependable Systems & Networks With FTCS & DCC (DSN) : June 24-27, 2008, Anchorage, Alaska2008 / p. C17-C22 : ill. [CD-ROM]

New built-in self-test scheme for SoC interconnectJutman, Artur; Ubar, Raimund-Johannes; Raik, JaanThe 9th World Multi-Conference on Systemics, Cybernetics and Informatics : WMSCI 2005 : July 10-13, 2005, Orlando, Florida, USA. Vol. IV2005 / p. 19-24 : ill

A new FPGA-based detection method for spurious variations in PCBA power distribution networkOdintsov, Sergei; Bozzoli, Ludovica; De Sio, Corrado; Sterpone, Luca; Jutman, Artur2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 6 p. : ill https://doi.org/10.1109/DDECS.2019.8724662

Off-line testing of crosstalk induced glitch faults in NoC InterconnectsBengtsson, Tomas; Kumar, Shashi; Jutman, Artur; Ubar, Raimund-JohannesProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 221-225 : ill http://dx.doi.org/10.1109/NORCHP.2006.329215

Off-line testing of delay faults in NoC interconnectsBengtsson, Tomas; Jutman, Artur; Kumar, Shashi; Peng, Zebo; Ubar, Raimund-Johannes9th EUROMICRO Conference on Digital Systems Design : Architectures, Methods and Tools (DSD 2006) : 30 August 2006-1 September 2006, Cavtat near Dubrovnik, Croatia : proceedings2006 / p. 677-680 : ill http://dx.doi.org/10.1109/DSD.2006.72

On coverage of timing related faults at board levelJutman, Artur; Aleksejev, Igor; Devadze, Sergei2016 21st IEEE European Test Symposium (ETS) : May 23rd-26th 2016, Amsterdam, The Netherlands : proceedings2016 / [2] p. : ill https://doi.org/10.1109/ETS.2016.7519295

On efficient logic-level simulation of digital circuits represented by the SSBDD modelJutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes23rd International Conference on Microelectronics : MIEL 2002, Niš, Yugoslavia, 12-15 May 2002 : proceedings. Volume 22002 / p. 621-624 : ill

On in-system programming of non-volatile memoriesTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomInternational journal of microelectronics and computer science2013 / p. 72-78 : ill

On in-system programming of non-volatile memoriesTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomProceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2013, Gdynia, Poland, June 20-22, 20132013 / p. 408-413 : ill

On LFSR polynomial calculation for test time reductionJutman, ArturComputer Science Meets Automation : 10-13 September 2007 : proceedings. Volume II2007 / p. 153-158 : ill

On SSBDD model size & complexityJutman, ArturECS'03 : proceedings of the 4th Electronic Circuits and Systems Conference : September 11-12, 2003, Bratislava, Slovakia2003 / p. 17-22

On-line fault classification and handling in IEEE1687 based fault management system for complex SoCsShibin, Konstantin; Devadze, Sergei; Jutman, ArturLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 69-74 : ill https://doi.org/10.1109/LATW.2016.7483342

Open-source JTAG simulator bundle for labsShibin, Konstantin; Devadze, Sergei; Rosin, Vjatšeslav; Jutman, Artur; Ubar, Raimund-JohannesInternational journal of electronics and telecommunications2012 / p. 233-239 : ill https://journals.pan.pl/Content/87192/PDF/32.pdf

Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill http://dx.doi.org/10.1007/s10836-016-5588-y

Optimization of structurally synthesized BDDsUbar, Raimund-Johannes; Vassiljeva, T.; Raik, Jaan; Jutman, Artur; Tombak, Mati; Peder, AhtiProceedings of the Fourth IASTED International Conference on Modelling, Simulation, and Optimization : August 17-19, 2004, Kavai, Hawaii, USA2004 / p. 234-240 : ill

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichMicroelectronics education : proceedings of the 5th European Workshop on Microelectronics Education, held in Lausanne, Switzerland, April 15-16, 20042004 / p. 253-258 : ill https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich5th European Workshop on Microelectronics Education - EWME 2004, Lausanne, 20042004 / p. 173-176 https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

Parallel exact critical path tracing fault simulation with reduced memory requirementsDevadze, Sergei; Ubar, Raimund-Johannes; Raik, Jaan; Jutman, Artur4th International Conference on Design and Technology of Integrated Systems in Nanoscal Era : DTIS'09 : Cairo, Egypt, April 6-9, 20092009 / p. 155-160 : ill https://ieeexplore.ieee.org/document/4938046

Parallel fault backtracing for calculation of fault coverageUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, Artur43rd International Conference on Microelectronics, Devices and Materials and the Workshop on Electronic Testing : September 12. - September 14.2007, Bled, Slovenia : MIDEM conference 2007 proceedings2007 / p. 165-170 : ill

Parallel fault backtracing for calculation of fault coverageUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, ArturProceedings of the ASP-DAC 2008 : [13th] Asia and South Pacific Design Automation Conference 2008 : January 21-24, 2008, COEX, Seoul, Korea2008 / p. 667-672 : ill

Parallel X-fault simulation with critical path tracing technique [Electronic resource]Ubar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, ArturDATE 10 : Design, Automation & Test in Europe : Dresden, Germany, 8-12 March, 20102010 / p. 879-884 [CD-ROM]

Post-silicon validation of IEEE 1687 reconfigurable scan networksDamljanovic, Aleksa; Jutman, Artur; Squillero, Giovanni; Tšertov, Anton2019 IEEE European Test Symposium (ETS) : proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791546

Practical works for on-line teaching design and test of digital circuitsJutman, Artur; Ubar, Raimund-Johannes; Hahanov, V.; Skvortsova, O.The 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume III2002 / p. 1223-1226 : ill http://dx.doi.org/10.1109/ICECS.2002.1046474

Reliable health monitoring and fault management infrastructure based on embedded instrumentation and IEEE 1687Jutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE AUTOTESTCON 2016 : Anaheim, California, USA, September 12-15, 2016 : proceedings2016 / p. 240-249 : ill https://doi.org/10.1109/AUTEST.2016.7589605

Research environment for teaching digital testIvask, Eero; Jutman, Artur; Orasson, Elmet; Raik, Jaan; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichSynergies between Information and Automation : 49. Internationales Wissenschaftliches Kolloquium, 27.-30.9.2004, Technische Universität Ilmenau, Germany. Volume 22004 / p. 468-473 : ill

Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/

Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

Reseeding using compaction of pre-generated LFSR sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : 31st August to 3rd September 2008, Malta : conference guide2008 / p. 215

Reseeding using compaction of pre-generated LFSR sub-sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : Malta2008 / p. 1290-1295 : ill http://dx.doi.org/10.1109/ICECS.2008.4675096

Re-using chip level DFT at board levelGu, Xinli; Jutman, ArturProceedings : 2012 17th IEEE European Test Symposium (ETS) : May 28th–June 1st, 2012, Annecy, France2012 / 1 p

Run-time reconfigurable instruments for advanced board-level testingAleksejev, Igor; Jutman, Artur; Devadze, SergeiIEEE AUTOTESTCON 2016 : Anaheim, California, USA, September 12-15, 2016 : proceedings2016 / p. 385-392 : ill https://doi.org/10.1109/AUTEST.2016.7589627

Run-time reconfigurable instruments for advanced board-level testingAleksejev, Igor; Jutman, Artur; Devadze, SergeiIEEE instrumentation & measurement magazine2017 / p. 23-30 : ill https://doi.org/10.1109/MIM.2017.8006390

Selected issues of modeling, verification and testing of digital systemsJutman, Artur2004 https://www.ester.ee/record=b1989760*est

Sequential test set compaction in LFSR reseedingJutman, Artur; Aleksejev, Igor; Raik, JaanDesign and test technology for dependable systems-on-chip2011 / p. 476-493 : ill

Shift register based TPG for at-speed interconnect BISTJutman, ArturMIEL 2004 : 24th International Conference on Microelectronics : Niš, Serbia and Montenegro, 16-19 May 2004 : proceedings. Volume 22004 / p. 751-754 : ill

Simulation-based equivalence checking between IEEE 1687 ICL and RTLDamljanovic, Aleksa; Jutman, Artur; Portolan, Michele; Tšertov, Anton2019 IEEE International Test Conference (ITC)2019 / paper. 7.3, 8 p. : ill https://doi.org/10.1109/ITC44170.2019.9000181

SoC and board modeling for processor-centric board testingTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei14th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : DSD 2011 : 31 August - 2 September 2011, Oulu, Finland : proceedings2011 / p. 575-582 : ill

SSBDD model : advantageous properties and efficient simulation algorithmsRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesETW'02 : 7th IEEE European Test Workshop, Gorfu Greece, May 26-29, 2002 : informal digest2002 / p. 345-346 : ill

SSBDDs : advantageous model and efficient algorithms for digital circuit modeling, simulation & testJutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes5th International Workshop on Boolean Problems : September 19-20, 2002,
Freiberg (Sachsen) : proceedings2002 / p. 157-166 : ill

Structural fault collapsing by superposition of BDDs for test generation in digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, ArturProceedings of the Eleventh International Symposium on Quality Electronic Design ISQED 2010 : March 22-24, 2010 San Jose, California USA2010 / p. 250-257 : ill

Structurally synthesized binary decision diagramsJutman, Artur; Peder, Ahti; Raik, Jaan; Tombak, Mati; Ubar, Raimund-JohannesBoolean Problems : 6th International Workshop : September 23-24, 2004, Freiberg2004 / p. 271-278 : ill

Structurally synthesized multiple input BDDs for simulation of digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, Artur16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009 : Yasmine Hammamet, Tunesia, 13-19 December, 20092009 / p. 451-454 : ill http://dx.doi.org/10.1109/ICECS.2009.5410895

Structurally synthesized multiple input BDDs for speeding up logic-level simulation of digital circuitsMironov, Dmitri; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, Artur13th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : DSD 2010 : Lille, France, 1-3 September 2010 : proceedings2010 / p. 658-663 : ill

A suite of IEEE 1687 benchmark networksTšertov, Anton; Jutman, Artur; Devadze, Sergei2016 IEEE International Test Conference (ITC) : proceedings2016 / art. 6.1, p. 1-10 : ill https://doi.org/10.1109/TEST.2016.7805840

Synchronization, calibration and triggering of IEEE 1687 embedded instrumentsJutman, Artur; Devadze, Sergei; Shibin, KonstantinThe Seventeenth Workshop on RTL and High Level Testing (WRTLT'16) : November 24-25, 2016, Aki Grand Hotel, Hiroshima, Japan2016 / [6] p

System modeling for processor-centric test automation = Süsteemide modelleerimine protsessorikesksete testprogrammide sünteesi automatiseerimiseksTšertov, Anton2012 https://www.ester.ee/record=b2751131*est

System-wide fault management based on IEEE P1687 IJTAGShibin, Konstantin; Jutman, Artur; Devadze, SergeiInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kuuenda aastakonverentsi artiklite kogumik : 3.-5. oktoobril 2012, Laulasmaa2012 / p. 81-84 : ill

Teaching digital RT-level self-test using a Java appletDevadze, Sergei; Jutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich20th IEEE NORCHIP Conference : Copenhagen, Denmark, November 11-12, 20022002 / p. 322-328 : ill

Teaching digital test with BIST analyzerJutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 123-128 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610171

Test methods for crosstalk-induced delay and glitch faults in network-on-chip interconnects implementing asynchronous communication protocolsBengtsson, Tomas; Kumar, Shashi; Ubar, Raimund-Johannes; Jutman, Artur; Peng, ZeboIET computers and digital techniques2008 / 6, p. 445-460

Testing beyond the SoCs in a lego styleTšertov, Anton; Jutman, Artur; Devadze, SergeiProceedings of IEEE East-West Design & Test Symposium (EWDTS'10) : St. Petersburg, Russia, September 17-20, 20102010 / p. 334-338 : ill

Testing toolsJutman, ArturHandbook of testing electronic systems2005 / p. 361-365 : ill

Testing tools for training and educationBalaž, M.; Jutman, Artur; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 12th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2005 : Krakow, Poland, 22-25 June, 2005. Vol. 1 of 22005 / p. 671-676 : ill

The synthesis level in Bloom's taxonomy - a nightmare for an LMSWuttke, Heinz-Dietrich; Ubar, Raimund-Johannes; Henke, Karsten; Jutman, Artur19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 199-204 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610186

Timing simulation of digital circuits with binary decision diagramsUbar, Raimund-Johannes; Jutman, Artur; Peng, Z.Design, Automation and Test in Europe : Conference and Exhibition 2001 : Munich, Germany, March 13-16, 2001 : proceedings2001 / p. 460-466 : ill

Towards artificial intelligence based automatic adaptive response analyzer for high frequency analog BISTPetlenkov, Eduard; Jutman, Artur; Nõmm, Sven; Ubar, Raimund-JohannesCIMSA 2008 : IEEE International Conference on Computational Intelligence for Measurement Systems and Applications : Istanbul, Turky, July 14-16, 20082008 / p. 99-104 : ill

Trainer 1149 : a boundary scan simulation bundle with hardware support for labsShibin, Konstantin; Jutman, ArturInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve2011 / p. 135-138 : ill

Trainer 1149: a boundary scan simulation bundle for labsJutman, Artur; Ubar, Raimund-Johannes; Devadze, Sergei; Shibin, Konstantin; Rosin, VjatšeslavMIXDES 2011 : 18th International Conference "Mixed Design of Integrated Circuits and Systems" : June 16-18, 2011, Gliwice, Poland2011 / p. 520-525

Turbo tester - diagnostic package for research and trainingAarna, Margit; Ivask, Eero; Jutman, Artur; Orasson, Elmet; Raik, Jaan; Ubar, Raimund-Johannes; Vislogubov, Vladislav; Wuttke, Heinz-DietrichRadioelectronics and informatics2003 / p. 69-73 : ill

Turning JTAG inside out for fast extended test accessDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-Johannes10th IEEE Latin American Test Workshop : 2-5 March 2009, Brazil2009 / [6] p. : ill https://ieeexplore.ieee.org/document/4813799

Ultra fast parallel fault analysis on structurally synthesized BDDsUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, Artur12th IEEE European Test Symposium ETS 2007 : 20-24 May 2007, Freiburg, Germany : proceedings2007 / p. 131-136 : ill http://dx.doi.org/10.1109/ETS.2007.43

Understanding boundary scan test with Trainer 1149Jutman, Artur; Devadze, Sergei; Shibin, Konstantin; Rosin, Vjatšeslav; Ubar, Raimund-Johannes22nd EAEEIE annual conference : June, 13-15, 2011, Maribor, Slovenija : conference book2011 / p. 21-22 https://ieeexplore.ieee.org/document/6165727

Ways for board and system test to benefit from FPGA embedded instrumentationEhrenberg, Heiko; Odintsov, Sergei; Devadze, Sergei; Jutman, Artur; Aleksejev, Igor; Wenzel, Thomas2019 IEEE AUTOTESTCON2019 / 10 p : ill https://doi.org/10.1109/AUTOTESTCON43700.2019.8961057

Web based tools for synthesis and testing of digital devicesDevadze, Sergei; Jutman, Artur; Kruus, Margus; Sudnitsõn, Aleksander; Ubar, Raimund-JohannesProceedings of the International Conference on Computer Systems and Technologies (e-Learning) : CompSysTech'2002, Sofia, Bulgaria, 20-21 June2002 / p. 1.9-1 - 1.9-6 : ill

Web-based applet for teaching boundary scan standard IEEE 1149.1Jutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-JohannesProceedings of the 10th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2003 : Lodz, Poland, 26-28 June 20032003 / p. 584-589 : ill

Web-based framework for distributed remote laboratory in the field of digital system testIvask, Eero; Jutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 182-187 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610183

Web-based software package for e-learning and research training in digital system designJutman, Artur; Kruus, Margus; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichИнформационные технологии в науке, образовании, телекоммуникации и бизнесе : Материалы XXXII  Международной конференции IT+SE'2005 : Украина, Крым, Ялта-Гурзуф, 19-28 мая 2005 г2005 / [2] p

Web-based training system for teaching basics of RT-level digital design, test, and design for test [Electronic resource]Devadze, Sergei; Jutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes9th International Conference MIXDES 2002 : Mixed Design of Integrated Circuits and Systems, Wroclaw, Poland, 20-22 June 20022002 / [6] p. : ill. [CD-ROM]

Web-based training system for teaching principles of boundary scan techniqueJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-JohannesProceedings of the 14th EAEEIE Annual International Conference on Innovation in Education for Electrical and Information Engineering (EIE) : Gdansk, Poland, 20032003 / p. 1-6 : ill

Virtual reconfigurable scan-chains on FPGAs for optimized board testAleksejev, Igor; Jutman, Artur; Devadze, Sergei; Shibin, Konstantin2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102411