Activity classification for real-time wearable systems : effect of window length, sampling frequency and number of features on classifier performanceAllik, Ardo; Pilt, Kristjan; Karai, Deniss; Fridolin, Ivo; Leier, Mairo; Jervan, Gert2016 IEEE EMBS Conference on Biomedical Engineering and Sciences (IECBES) : Kuala Lumpur, 4-8 December 20162016 / p. 460-464 : ill https://doi.org/10.1109/IECBES.2016.7843493

Advancing novel physical fatigue assessment and human activity monitoring methods towards perzonalized feedback with wearable sensors = Kantavatel seadmetel põhinevate füüsilise väsimuse hindamise ning inimese aktiivsuse monitoorimise meetodite arendamine personaalseks tagasisideksAllik, Ardo2022 https://doi.org/10.23658/taltech.62/2022 https://digikogu.taltech.ee/et/Item/230f302e-0cf1-4b86-a9d3-0927a51b36e2 https://www.ester.ee/record=b5525012*est

Analog integrated circuits and signal processingEllervee, Peeter; Jervan, Gert2010

An approach to system-level design for testJervan, Gert; Ubar, Raimund-Johannes; Peng, Z.; Eles, PetruSystem-level test and validation of hardware/software systems2005 / p. 121-149 : ill

Arvutite õpetamisest siinpool Läänemerd ja sealpool Idamerd : [õppetööst Rootsi ülikoolides]Jervan, GertA & A2007 / lk. 5-10 : ill

Assembling low-level tests to high-level symbolic test framesJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings [of the] 15th NORCHIP Conference, Tallinn, 10-11 November 19971997 / p. 275-280: ill

Asutajadekaanid : eesmärk on anda inimestele võimalus oma tööd paremini tehaOorn, Arvo; Jervan, Gert; Kanger, Tõnis; Listra, EnnMente et Manu2016 / lk. 18-23 : fot http://www.ttu.ee/public/u/ulikool/Tutvustus/ajaleht-mente-et-manu/MM_2016_05/index.html

Augmented coaching ecosystem for non-obtrusive adaptive personalized elderly care on the basis of cloud-fog-dew computing paradigm [Electronic resource]Gordienko, Yuri; Stirenko, S.; Alienin, O.; Jervan, Gert2017 40th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), May 22 - 26, 2017, Opatija, Croatia : proceedings2017 / p. 359-364 : ill. [CD-ROM] https://doi.org/10.23919/MIPRO.2017.7973449

Automated area and coverage optimization of minimal latency checkersAzad, Siavoosh Payandeh; Niazmand, Behrad; Apneet Kaur; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2017 22nd IEEE European Test Symposium (ETS 2017), Limassol, Cyprus, 22 – 26 May 2017 : proceedings2017 / p. 7-8 : ill https://doi.org/10.1109/ETS.2017.7968211

An automated method for mining high-quality assertion setsHeidari Iman, Mohammadreza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, TaraMicroprocessors and microsystems2023 / art. 104773 https://doi.org/10.1016/j.micpro.2023.104773

Automated minimization of concurrent online checkers for network-on-chipsSaltarelli, Pietro; Niazmand, Behrad; Hariharan, Ranganathan; Raik, Jaan; Jervan, Gert; Hollstein, Thomas10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC 2015) : Bremen, 29 June - 1 July 20152015 / [8] p. : ill http://dx.doi.org/10.1109/ReCoSoC.2015.7238079

Automatic test generation system for VLSIJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the First Electronic Circuits and Systems Conference : Bratislava, Slovakia, September 4-5, 19971997 / p. 255-258

AWAIT : an ultra-lightweight soft-error mitigation mechanism for network-on-chip linksJanson, Karl; Pihlak, Rene; Azad, Siavoosh Payandeh; Niazmand, Behrad; Jervan, Gert; Raik, Jaan2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Lille, France, July 9th-11th, 20182018 / p. 1-6 : ill https://doi.org/10.1109/ReCoSoC.2018.8449374

Black-box assessment of optical spectrum servicesKaeval, Kaida; Elbers, Jörg-Peter; Grobe, Klaus; Tikas, Marko; Fehenberger, Tobias; Griesser, Helmut; Jervan, Gert2021 Optical Fiber Communications Conference and Exhibition (OFC) : 6-10 June 2021 : San Francisco, CA, USA2021 / 3 p https://ieeexplore.ieee.org/document/9489700

CAD software for digital test and diagnosticsJervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of International Conference on Design and Diagnostics of Electronic Circuits and Systems, Ostrava, Czech Republik, May 12-14, 19971997 / p. 35-40

CAESAR-MPSoC : dynamic and efficient MPSoC security zonesAzad, Siavoosh Payandeh; Tempelmeier, Michael; Jervan, Gert; Sepulveda, Johanna2019 IEEE Computer Society Annual Symposium on VLSI : ISVLSI 2019 : proceedings2019 / p. 477-482 : ill https://doi.org/10.1109/ISVLSI.2019.00092

Channel performance estimations with extended channel probingKaeval, Kaida; Griesser, Helmut; Grobe, Klaus; Elbers, Jörg-Peter; Tikas, Marko; Jervan, GertPhotonic Networks : 21th ITG-Symposium : 24-25 November 2020 : online2020 / p. 60-64 http://d-nb.info/1223037061 https://ieeexplore.ieee.org/document/9273755

Characterization of the optical spectrum as a serviceKaeval, Kaida; Jansen, Sander Lars; Spinty, Florian; Grobe, Klaus; Griesser, Helmut; Fehenberger, Tobias; Tikas, Marko; Jervan, GertJournal of Optical Communications and Networking2022 / p. 398-410 https://doi.org/10.1364/JOCN.454158 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Classification algorithm improvement for physical activity recognition in maritime environmentsAllik, Ardo; Pilt, Kristjan; Karai, Deniss; Fridolin, Ivo; Leier, Mairo; Jervan, GertWorld Congress on Medical Physics and Biomedical Engineering 2018 : June 3–8, 2018, Prague, Czech Republic (Vol. 3)2019 / p. 13-17 https://doi.org/10.1007/978-981-10-9023-3_3 Conference proceeding Article at Scopus Article at WOS

Communication modelling and synthesis for NoC-based systems with real-time constraintsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertProceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany2011 / p. 237-242 : ill https://www.semanticscholar.org/paper/Communication-modelling-and-synthesis-for-NoC-based-Tagel-Ellervee/71f9595d88ed06b63367b87188b218fe6da6bd97

Comparison of predictive equations for basal metabolic rateAllik, Ardo; Mägi, Siiri; Pilt, Kristjan; Karai, Deniss; Fridolin, Ivo; Leier, Mairo; Jervan, GertWireless Mobile Communication and Healthcare : 7th International Conference, MobiHealth 2017, Vienna, Austria, November 14–15, 2017 : proceedings2018 / p. 261-264 : ill https://doi.org/10.1007/978-3-319-98551-0 Conference Proceedings at Scopus Article at Scopus Article at WOS

Comprehensive performance and robustness analysis of 2D turn models for network-on-chipsAzad, Siavoosh Payandeh; Niazmand, Behrad; Janson, Karl; Kogge, Thilo; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2017 IEEE International Symposium on Circuits and Systems (ISCAS)2017 / p. 1476-1479 : ill https://doi.org/10.1109/ISCAS.2017.8050634

Concatenated GSNR profiles for end-to-end performance estimations in disaggregated networksKaeval, Kaida; Myyry, Jani; Grobe, Klaus; Griesser, Helmut; Jervan, Gert2022 Optical Fiber Communications Conference and Exhibition (OFC) : San Diego, California, USA, 6 – 10 March 2022 : proceedings2022 / 3 p https://ieeexplore.ieee.org/document/9748620/figures#figures

A constraint-driven gate-level test generatorRaik, Jaan; Ubar, Raimund-Johannes; Jervan, Gert; Krupnova, HelenaBEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings1996 / p. 237-240: ill

Contention aware scheduling for NoC-based real-time systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve2011 / p. 75-78 : ill

Contention aware scheduling for NoC-based real-time systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertNorchip 2011 : 14-15 November 2011, Lund2011 / [4] p.: ill

CR14 ja Tallinna Tehnikaülikool sõlmisid leppe Eesti noorte küberkaitsevõistluse edendamiseksElektriala2023 / lk. 11-12 : foto https://www.ester.ee/record=b1240496*est

Cross-layer dependability management in network on chip based system on chip = Kiipvõrkudel põhinevate süsteemide kihtideülene usaldatavuse haldusAzad, Siavoosh Payandeh2018 https://digi.lib.ttu.ee/i/?9948

DATE 2007 konverentsi ülevaade : [ka TTÜ arvutitehnika instituudi osalemisest konverentsil]Tagel, Mihkel; Reinsalu, Uljana; Jervan, GertA & A2007 / 3, lk. 59-61 https://artiklid.elnet.ee/record=b1020793*est

DECIDER : a decision diagram based hierarchical test generation systemJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 2nd International Workshop on Design and Diagnostics of Electronic Circuits and Systems, Szczyrk, Poland, September 2-4, 19981998 / p. 269-273

A decision diagram based hierarchical test pattern generatorJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesBEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 159-162: ill

Dependability evaluation in fault-tolerant systems with high-level decision diagramsUbar, Raimund-Johannes; Jervan, Gert; Raik, Jaan; Jenihhin, Maksim; Ellervee, PeeterComputer Science Meets Automation : 10-13 September 2007 : proceedings. Volume II2007 / p. 147-152 : ill https://www.db-thueringen.de/receive/dbt_mods_00008864

Dependability improvements of NoC-based systems = Töökindluse parandamine kiipvõrkudel põhinevates süsteemidesNiazmand, Behrad2018 https://digi.lib.ttu.ee/i/?9879

Dependable embedded systems : FP7 KhAI-ERA project experienceKharchenko, Vyacheslav; Kulanov, Vitaliy; Jervan, Gert10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 26-30 : ill

Design and verification of secure cache wrapper against access-driven side-channel attacksNiazmand, Behrad; Azad, Siavoosh Payandeh; Jervan, Gert; Sepulveda, JohannaEuromicro Conference on Digital System Design : DSD 2019 : 28 - 30 August 2019 Kallithea, Chalkidiki, Greece : proceedings2019 / p. 672-676 : ill https://doi.org/10.1109/DSD.2019.00108

Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraintsAmin, Mohsin; Tagel, Mihkel; Jervan, Gert; Hollstein, Thomas7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip : July 9-11, 2012 : York, United Kingdom : proceedings2012 / [6 p.] : ill

Design space exploration and optimisation for NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 177-180 : ill

Design space exploration and optimisation for NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / lk. 117-120 : ill

Deterministic traffic generator for network-on-chip simulatorTagel, Mihkel; Jervan, GertWorkshop Digest. Diagnostic Services in Network-on-Chips - Test, Debug, and On-Line Monitoring : DATE 2007 : Nice, France, 16-20 April, 20072007 / p. 288-290

Deterministic traffic generator for network-on-chip simulatorTagel, Mihkel; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 72-75 : ill

Digikeskus GovAILab aitab riigil luua tõhusaid tehisintellekti põhiseid lahendusiMente et Manu2019 / lk. 7 : portr https://www.ttu.ee/public/m/mente-et-manu/MM_05_2019/mobile/index.html https://www.ester.ee/record=b1242496*est

Digital design flow with test activitiesDiener, Karl-Heinz; Elst, G.; Ivask, Eero; Jervan, Gert; Peng, Z.; Raik, Jaan; Ubar, Raimund-JohannesVILAB User Forum2000 / [11] p

Doktoriõppe arengud ja kitsaskohadJervan, GertA & A2010 / 4, lk. 6-9

Dynamic and distributed security management for NoC Based MPSoCsAzad, Siavoosh Payandeh; Jervan, Gert; Sepulveda, JohannaComputational Science - ICCS 2019 : 19th International Conference, Faro, Portugal, June 12-14, 2019 : Proceedings, Part II2019 / p. 649–662 : ill https://doi.org/10.1007/978-3-030-22741-8_4 Conference proceeding at Scopus Article at Scopus Conference proceeding at WOS Article at WOS

Edge intelligence resource consumption by UAV-based IR object detectionPolukhin, Andrii; Gordienko, Yuri; Leier, Mairo; Jervan, Gert; Rokovyi, Oleksandr; Alienin, Oleg; Stirenko, SergiiUAVM '23 : proceedings of the 2023 Workshop on UAVs in multimedia : capturing the world from a new perspective2023 / p. 57-61 https://doi.org/10.1145/3607834.3616566

Eesti – innovaatiline tiiger või hääbuv väikeriik [Võrguväljaanne]Jervan, Gertpostimees.ee2022 "Eesti – innovaatiline tiiger või hääbuv väikeriik"

Eesti - innovaatiline tiiger või hääbuv väikeriik?Jervan, GertMente et Manu2022 / lk. 4-5 : portr https://www.ester.ee/record=b1242496*est

Eesti vajab uusi teadlasiJervan, GertPostimees2021 / Lk. 13 https://dea.digar.ee/article/postimees/2021/06/17/12.6

Eestis langes tähtis otsus: 5G ei tapa [Võrguväljaanne}Pau, Aivartehnika.postimees.ee2019 / fot Eestis langes tähtis otsus: 5G ei tapa

Embedded software solutions for development of marine navigation light system = Sardtarkvara lahendused valgusnavigatsiooni süsteemide arenduselMoorits, Erkki2016 http://digi.lib.ttu.ee/i/?6383

Employing channel probing to derive end-of-life service margins for optical spectrum servicesKaeval, Kaida; Slyne, Frank; Troia, Sebastian; Kenny, Eoin; Grobe, Klaus; Griesser, Helmut; Kilper, Daniel C.; Ruffini, Marco; Pedreno-Manresa, Jose-Juan; Patri, Sai Kireet; Jervan, GertJournal of optical communications and networking2023 / p. C63-C73 : ill https://doi.org/10.1364/JOCN.480080

Enabling secure MPSoC dynamic operation through protected communicationAzad, Siavoosh Payandeh; Niazmand, Behrad; Jervan, Gert; Sepulveda, Johanna2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS), Bordeaux, France, December 9–12, 20182018 / p. 481-484 : ill https://doi.org/10.1109/ICECS.2018.8617940

Energy minimization for hybrid BIST in a system-on-chip test environmentUbar, Raimund-Johannes; Shchenova, Tatjana; Jervan, Gert; Peng, ZeboEuropean Test Symposium : ETS 2005 : 22-25 May 2005, Tallinn, Estonia : proceedings2005 / p. 2-7 : ill

Evaluation of SysML software for teaching systems engineering basicsKruus, Helena; Jervan, GertProceedings of the 25th International Conference on European Association for Education in Electrical and Information Engineering : 30 May-June 2014, Cesme, Türkiye2014 / p. 29-32 : ill

Exploring service margins for optical spectrum servicesKaeval, Kaida; Slyne, Frank; Troia, Sebastian; Kenny, Eoin; Pedreno-Manresa, Jose-Juan; Patri, Sai Kireet; Grobe, Klaus; Kilper, Daniel C.; Ruffini, Marco; Jervan, GertProceedings European Conference on Optical Communication (ECOC 2022), 18-22 September 2022, Basel, Switzerland2022 / art. Mo3B.4, 4 p https://opg.optica.org/abstract.cfm?uri=ECEOC-2022-Mo3B.4

Extended checkers for control part of routers in network-on-chipsHariharan, Ranganathan; Niazmand, Behrad; Hollstein, Thomas; Raik, Jaan; Jervan, GertMEDIAN 2015 : the 4th Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : March 13, 2015, Grenoble, France2015 / p. 36-39 : ill

Extended checkers for logic-based distributed routing in network-on-chipsNiazmand, Behrad; Hariharan, Ranganathan; Govind, Vineeth; Jervan, Gert; Hollstein, Thomas; Raik, JaanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 83-86 : ill

Extended checkers for logic-based distributed routing in network-on-chipsNiazmand, Behrad; Hariharan, Ranganathan; Govind, Vineeth; Jervan, Gert; Hollstein, Thomas; Raik, JaanBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 77-80 : ill

Fall detection and activity recognition system for usage in smart work-wear [Online resource]Leier, Mairo; Jervan, Gert; Allik, Ardo; Pilt, Kristjan; Karai, Deniss; Fridolin, IvoBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p.: ill https://doi.org/10.1109/BEC.2018.8600959

Fast test cost calculation for hybrid BIST in digital systemsOrasson, Elmet; Raidma, Rein; Ubar, Raimund-Johannes; Jervan, Gert; Peng, ZeboEuromicro Symposium on Digital Systems Design : [Architectures, Methods and Tools : DSD 2001] : September 4-6, 2001, Warsaw, Poland : proceedings2001 / p. 318-325 : ill

Fault model and test synthesis for RISC-processorsUbar, Raimund-Johannes; Markus, Antti; Jervan, Gert; Raik, JaanBEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings1996 / p. 229-232: ill

Fault-resilient NoC router with transparent resource allocationPutkaradze, Tsotne; Azad, Siavoosh Payandeh; Niazmand, Behrad; Raik, Jaan; Jervan, Gert12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC2017), July 12-14, 2017, Madrid, Spain : proceedings2017 / 8 p. : ill https://doi.org/10.1109/ReCoSoC.2017.8016161 https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8016161

Fault-tolerant scheduling of mixed-critical applications on multi-processor platformsBagheri, Mehrdad; Jervan, Gert2014 International Conference on Embedded and Ubiquitous Computing : EUC 2014 : 26-28 August 2014, Milano, Italy : proceedings2014 / p. 25-32 : ill

FPGA based emulation environmentJervan, Gert; Arhipov, Anton; Ellervee, Peeter2nd International Workshop on Reconfigurable Communication Centric System-on-Chip (ReCoSoC'06)2006

A framework for area-efficient concurrent online checkers designSaltarelli, Pietro; Niazmand, Behrad; Hariharan, Ranganathan; Raik, Jaan; Jervan, Gert; Hollstein, ThomasMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 64-69 : ill

A framework for combining concurrent checking and online embedded test for low-latency fault detection in NoC routersSaltarelli, Pietro; Niazmand, Behrad; Raik, Jaan; Govind, Vineeth; Hollstein, Thomas; Jervan, Gert; Hariharan, RanganathanNOCS '15 : International Symposium on Networks-on-Chip : Vancouver, BC, Canada, September 28-30, 20152015 / [8] p. : ill http://dx.doi.org/10.1145/2786572.2788713

A framework for comprehensive automated evaluation of concurrent online checkersSaltarelli, Pietro; Niazmand, Behrad; Raik, Jaan; Hariharan, Ranganathan; Jervan, Gert; Hollstein, ThomasEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 288-292 : ill http://dx.doi.org/10.1109/DSD.2015.15

From online fault detection to fault management in network-on-chips : a ground-up approachAzad, Siavoosh Payandeh; Niazmand, Behrad; Janson, Karl; Nevin, George; Oyeniran, Adeboye Stephen; Putkaradze, Tsotne; Apneet Kaur; Raik, Jaan; Jervan, Gert; Ubar, Raimund-Johannes; Hollstein, ThomasProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 48-53 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

Generalization of network-on-chip communication modellingEllervee, Peeter; Tagel, Mihkel; Jervan, GertWorkshop Digest. Diagnostic Services in Network-on-Chips - Test, Debug, and On-Line Monitoring : DATE 2009 : Nice, France, 20-24 April, 20092009 / ? p

Gert Jervan: TalTechi uurimisrühma tulemusel on Eesti kui digiriigi eestvedaja paremini kaitstudKald, Indrekituudised.ee2023 Gert Jervan: TalTechi uurimisrühma tulemusel on Eesti kui digiriigi eestvedaja paremini kaitstud

Gert Jervan: tehisintellekti tark kasutamine võib inimkonnale palju kasu tuuakultuur.err.ee2023 Gert Jervan: tehisintellekti tark kasutamine võib inimkonnale palju kasu tuua

Gert Jervan: Tehisintellektiga on praegu nii nagu kunagi tuumarelvadega – tõestada, et me suudame seda tehaTammepuu, Kadri; Jervan, Gerttv.postimees.ee2023 Gert Jervan: Tehisintellektiga on praegu nii nagu kunagi tuumarelvadega – tõestada, et me suudame seda teha

Graduate School in Information and Communication Technologies : experiences at Tallinn University of TechnologyJervan, Gert; Kruus, Margus; Rüstern, EnnuProceedings MSE 2007 : 2007 IEEE International Conference on Microelectronic Systems Education : 3-4 June 2007, San Diego, CA2007 / p. 25-26

Handling of SETs on NoC links by exploitation of inherent redundancy in circular input buffers [Online resource]Janson, Karl; Pihlak, Rene; Azad, Siavoosh Payandeh; Niazmand, Behrad; Jervan, Gert; Raik, JaanBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p.: ill https://doi.org/10.1109/BEC.2018.8600989

Head lõpetajad! = Dear graduates!Land, Tiit; Sergejev, Fjodor; Jervan, Gert; Salupere, Andrus; Listra, Enn; Leiger, RoometMente et Manu2021 / lk. 30-50 : fot https://www.ester.ee/record=b1242496*est

A hierarchical approach for devising area efficient concurrent online checkersNiazmand, Behrad; Azad, Siavoosh Payandeh; Ghasempouri, Tara; Raik, Jaan; Jervan, GertProceedings 2nd IEEE International Test Conference in Asia : ITC-Asia 2018, 15-17 August 2018, Harbin, China2018 / p. 139-144 : ill https://doi.org/10.1109/ITC-Asia.2018.00034

A hierarchical automatic test pattern generator based on using alternative graphsBrik, Marina; Jervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 4th International Workshop Mixed Design of Integrated Circuits and Systems : MIXDES'97 : Poznan, Poland, 12-14 June 19971997 / p. 415-420

Hierarchical calculation of malicious faults for evaluating the fault-toleranceUbar, Raimund-Johannes; Devadze, Sergei; Jenihhin, Maksim; Raik, Jaan; Jervan, Gert; Ellervee, PeeterProceedings : Fourth IEEE International Symposium on Electronic Design, Test and Applications : [DELTA 2008] : 23-25 January 2008, Hong Kong, SAR, China2008 / p. 222-227 : ill

Hierarchical test generation for digital systemsBrik, Marina; Jervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesMixed design of integrated circuits and systems1998 / p. 131-136: ill

Hierarchical test generation with multi-level decision diagram modelsJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 7th IEEE North Atlantic Test Workshop, West Greenwich RI, USA, May 28-29, 19981998 / p. 26-33

High-level synthesis and test in the MOSCITO-based virtual laboratorySchneider, Andre; Diener, Karl-Heinz; Jervan, Gert; Peng, Z.; Raik, Jaan; Ubar, Raimund-Johannes; Hollstein, Thomas; Glesner, M.BEC 2002 : proceedings of the 8th Biennial Baltic Electronics Conference : October 6-9, 2002, Tallinn, Estonia2002 / p. 287-290 : ill

High-level test synthesis with hierarchical test generationJervan, Gert; Eles, Petru; Peng, Zebo; Raik, Jaan; Ubar, Raimund-Johannes17th NORCHIP Conference : Oslo, Norway, 8-9 November 1999 : proceedings1999 / p. 291-296

Hirm masinate ees: tehisintellekti liiga kiirele arengule tõmmatakse piduritStrandberg, Marek; Einama, KaidoPostimees2023 / lk. 5 https://dea.digar.ee/article/postimees/2023/03/31/3.11 Hirm masinate ees: tehisintellekti liiga kiirele arengule tahetakse tõmmata pidurit

Holistic approach for Fault-Tolerant Network-on-Chip based many-core systems [Online resource]Azad, Siavoosh Payandeh; Niazmand, Behrad; Raik, Jaan; Jervan, Gert; Hollstein, ThomasarXiv.org2016 / [8] p. : ill

How to emulate Network-on-Chip?Ellervee, Peeter; Jervan, GertProceedings of the IEEE East-West Design & Test Workshop (EWDTW'06) : Sochi, Russia, September 15-19, 20062006 / p. 282-286 : ill

A hybrid BIST architecture and its optimization for SoC testingJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Kruus, HelenaProceedings of the 3rd International Symposium on Quality Electronic Design : ISQED 2002, March 18-21, 2002, San Jose, California2002 / p. 273-279 : ill

Hybrid BIST energy minimisation technique for system-on-chip testingJervan, Gert; Peng, Zebo; Shchenova, Tatjana; Ubar, Raimund-JohannesIEE proceedings computers & digital techniques2006 / 4, p. 208-216 : ill https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=5ae755d323ccba87f8ff886334e3dd6d33560874

Hybrid BIST methodology for testing core-based systemsJervan, Gert; Ubar, Raimund-Johannes; Peng, ZeboProceedings of the Estonian Academy of Sciences. Engineering2006 / 3-2, p. 300-322 : ill

Hybrid BIST optimization for core-based systems with test pattern broadcastingUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, ZeboDELTA 2004 : second IEEE International Workshop on Electronic Design, Test and Applications : 28-30 January 2004, Perth, Australia : proceedings2004 / p. 3-8 : ill http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10057

Hybrid BIST optimization using reseeding and test set compactionJervan, Gert; Orasson, Elmet; Kruus, Helena; Ubar, Raimund-Johannes10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 596-603 : ill http://dx.doi.org/10.1109/DSD.2007.4341529

Hybrid BIST optimization using reseeding and test set compactionJervan, Gert; Orasson, Elmet; Kruus, Helena; Ubar, Raimund-JohannesMicroprocessors and microsystems2008 / 5/6, p. 254-262 : ill

Hybrid BIST scheduling for NoC-based SoCsJervan, Gert; Shchenova, Tatjana; Ubar, Raimund-JohannesProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 141-144 : ill https://ieeexplore.ieee.org/document/4126966

Hybrid BIST time minimization for core-based systems with STUMPS architectureJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, Maksim18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : 3-5 November 2003, Boston, Massachusetts : proceedings2003 / p. 225-232 : ill

Hybrid built-in self-test and test generation techniques for digital systemsJervan, Gert2005 https://www.ester.ee/record=b2177537*est

IKT haridus ülikoolides läbi TTÜ arvutitehnika instituudi vaateprismaKruus, Margus; Jervan, GertArvutimaailm2010 / 5, lk. 8-9 : fot https://artiklid.elnet.ee/record=b2409375*est

IMMizer : an innovative cost-effective method for minimizing assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jervan, Gert; Ghasempouri, TaraProceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 20222022 / p. 671 - 678 https://doi.org/10.1109/DSD57027.2022.00095 Article at Scopus Article at WOS

An improved estimation methodology for hybrid BIST cost calculationJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Korelina, OlgaProceedings [of] 22nd NORCHIP Conference : Oslo, Norway, 8-9 November 20042004 / p. 297-300 : ill

An improved estimation technique for hybrid BIST test set generationJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Korelina, OlgaDDECS : 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems : April 13-16, 2005, Sopron, Hungary : proceedings2005 / p. 182-185 : ill

Innovaatiline tiiger või hääbuv väikeriik?Jervan, GertPostimees2022 / Lk. 13 https://dea.digar.ee/article/postimees/2022/04/26/13.7

Innovation and entrepreneurship in the computer systems curricula and Nordic Master School in innovative ICTJervan, Gert; Ellervee, Peeter; Kruus, Margus22nd EAEEIE annual conference : June, 13-15, 2011, Maribor, Slovenija : conference book2011 / p. 9

IT Akadeemia - hea näide, kuidas süstemaatiliselt koostööd tehaJervan, GertMente et Manu2022 / lk. 30-31 : portr https://www.ester.ee/record=b1242496*est

An iterative approach to test time minimization for parallel hybrid BIST architectureUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, Z.5th IEEE Latin-American Test Workshop - LATW 2004 : Cartagena, Colombia, 2004 : digest of papers2004 / p. 98-103 : ill

An iterative approach to test time minimization for parallel hybrid BIST architecturesUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, Z.System-on-Chip Conference 2004 : Bastad, Sweden2004 / p. ?

IT-hariduse skeletiks on nüüd inseneriks saamineJervan, Gert; Lorents, PeeterMente et Manu2017 / lk. 39-41 : fot http://www.ester.ee/record=b1242496*est

IT-teaduskond tähistab sügisel TalTechi sünnipäeva 102 loenguga Eesti koolideleMente et Manu2020 / lk. 14 https://www.ester.ee/record=b1242496*est

IT-valdkond vajab tudengeid välisriikidestJervan, GertEesti Päevaleht2014 / Ärileht, lk. 16-17

Jaak Aaviksoo tuleb rektoriks kinnitadaJervan, GertEesti Päevaleht2015 / lk. 11

Keerukate arvutisüsteemide uurimine Tallinna TehnikaülikoolisJervan, Gert; Ellervee, Peeter; Ubar, Raimund-JohannesTallinna Tehnikaülikooli aastaraamat 20072008 / lk. 42-60 : ill

Kolm professorit versus ChatGPTRussak, ÜloHarju Elu2023 / Lk. 3 https://dea.digar.ee/article/harjuelu/2023/04/14/4.1 Kolm professorit versus ChatGPT

Kui internet saab täisJervan, GertPostimees2020 / Lk. 13 https://dea.digar.ee/article/postimees/2020/07/30/11.3 https://leht.postimees.ee/7028359/gert-jervan-kui-eesti-internet-saab-tais

10 põhjust, miks astuda TalTechi IT-teaduskondaarileht.delfi.ee2023 10 põhjust, miks astuda TalTechi IT-teaduskonda

Logic-based implementation of fault-tolerant routing in 3D Network-on-ChipsNiazmand, Behrad; Azad, Siavoosh Payandeh; Flich, Jose; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) : Nara, Japan, 31 August - 2 September 20162016 / [8] p. : ill https://doi.org/10.1109/NOCS.2016.7579317

Low resource demanding FOTA method for remote AtoN site equipmentMoorits, Erkki; Jervan, GertOCEANS 2010 : Seattle, Washington, USA, September 20-23, 20102010 / [5] p

Low-cost CAD system for teaching digital testUbar, Raimund-Johannes; Raik, Jaan; Paomets, Priidu; Ivask, Eero; Jervan, Gert; Markus, AnttiMicroelectronics education : proceedings of the European Workshop, Grenoble, France, 5-6 Feb 19961996 / p. 185-188

[Lõpetajad = Graduates]Land, Tiit; Sergejev, Fjodor; Jervan, Gert; Salupere, Andrus; Listra, Enn; Leiger, RoometMente et Manu2022 / lk. 24-43 : fot https://www.ester.ee/record=b1242496*est

[Lõpetajad = Graduates]Land, Tiit; Sergejev, Fjodor; Jervan, Gert; Salupere, Andrus; Avarmaa, Mari; Leiger, RoometMente et Manu2023 / lk. 30-49 : fot https://www.ester.ee/record=b1242496*est

[Lõpetajad 2018 : rektori ja dekaanide kõned]Aaviksoo, Jaak; Kanger, Tõnis; Jervan, Gert; Oorn, Arvo; Listra, Enn; Leiger, RoometMente et Manu2018 / lk. 16-31 : portr https://ttu.ee/public/m/mente-et-manu/MM_02_2018/mobile/index.html#p=6 http://www.ester.ee/record=b1242496*est http://dea.digar.ee/publication/AKmenteetmanu

[Lõpetajad 2019 : rektori ja dekaanide soovid]Aaviksoo, Jaak; Jervan, Gert; Kanger, Tõnis; Listra, Enn; Oorn, Arvo; Leiger, RoometMente et Manu2019 / lk. 18-35 : fot https://www.ester.ee/record=b1242496*est https://www.ttu.ee/public/m/mente-et-manu/MM_03_2019/mobile/index.html

Meditsiinitehnika lipulaeva Karl Storzi ja TalTechi koostöös sünnivad maailmamuutvad teadus- ja uurimisprojektidRaag, Toomasdigi.geenius.ee2023 Meditsiinitehnika lipulaeva Karl Storzi ja TalTechi koostöös sünnivad maailma muutvad teadus- ja uurimisprojektid Meditsiinitehnika lipulaeva Karl Storzi ja TalTechi koostöös sünnivad maailmamuutvad teadus- ja uurimisprojektid

A methodology for automated mining of compact and accurate assertion setsHeidari Iman, Mohammadreza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, Tara2021 IEEE Nordic Circuits and Systems Conference (NorCAS) : Oslo, Norway, October 26-272021 / 7 p. : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9599865 https://doi.org/10.1109/NorCAS53631.2021.9599865

Microprocessors and microsystems : MICPRO : embedded hardware design2010

Mida on õppida Rootsist? : [Linköpingi Ülikooli doktorandi tähelepanekuid : võrdlusi TTÜga]Jervan, GertMente et Manu2001 / 22. mai, lk. 2 : fot https://www.ester.ee/record=b1242496*est

Mida vinget tõi lõppev aasta tehnikailma? : [2016. aasta olulisematest uuendustest tehnoloogiamaailmas : ekspertidena vastavad Gert Jervan, Argo Virkebau, ... Maarja Kruusmaa jt.]Pau, AivarPostimees2016 / lk. 24-25 : ill

Miniaturized wireless monitor for long-term monitoring of newbornsLeier, Mairo; Jervan, GertBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 193-196 : ill

Missioonikriitiliste sardsüsteemide arendamise nimel : [Integreeritud Elektroonikasüsteemide ja Biomeditsiinitehnika Tippkeskusest : intervjuu Raimund Ubari ja Gert Jervaniga]Ubar, Raimund-Johannes; Jervan, Gert; Ummelas, MartMente et Manu2009 / 30. jaan., lk. 1, 3 : ill ; 16. veebr., lk. 5 : ill https://www.ester.ee/record=b1242496*est

Mixed-level deterministic-random test generation for digital systemsJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 5th International Conference on Mixed Design of Integrated Circuits and Systems, Lodz, Poland, June 18-20, 19981998 / p. 335-340

Mixed-level test generator for digital systemsBrik, Marina; Jervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering1997 / 4, p. 271-282 : ill

A novel physical fatigue assessment method utilizing heart rate variability and pulse arrival time towards personalized feedback with wearable sensorsAllik, Ardo; Pilt, Kristjan; Viigimäe, Moonika; Fridolin, Ivo; Jervan, GertSensors2022 / art. 1680 https://doi.org/10.3390/s22041680 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Object detection for rescue operations by high-altitude infrared thermal imaging collected by unmanned aerial vehiclesPolukhin, Andrii; Gordienko, Yuri; Jervan, Gert; Stirenko, SergiiPattern Recognition and Image Analysis : 11th Iberian Conference, IbPRIA 2023, Alicante, Spain, June 27–30, 2023 : proceedings2023 / p. 490-504 https://doi.org/10.1007/978-3-031-36616-1_39

Optical spectrum services in Open Disaggregated Transport Networks = Optilise spektri teenused avatud lainepikkustihendus võrkudesKaeval, Kaida2023 https://doi.org/10.23658/taltech.13/2023 https://digikogu.taltech.ee/et/Item/aeb5432f-9aff-4683-bcd6-1bc5b04432d0 https://www.ester.ee/record=b5557127*est

Optimization of memory-constrained hybrid BIST for testing core-based systemsJervan, Gert; Kruus, Helena; Orasson, Elmet; Ubar, Raimund-JohannesProceedings of the IEEE 2nd International Symposium on Industrial Embedded Systems : SIES'2007 : Lisbon, Portugal, 4-6 July 20072007 / p. 71-77

Optimization of memory-constrained hybrid BIST for testing core-based systemsJervan, Gert; Kruus, Helena; Orasson, Elmet; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 133-136 : ill

Optimization of physical activity recognition for real-time wearable systems : effect of window length, sampling frequency and number of featuresAllik, Ardo; Pilt, Kristjan; Karai, Deniss; Fridolin, Ivo; Leier, Mairo; Jervan, GertApplied sciences2019 / art. 4833, 14 p. : ill https://doi.org/10.3390/app9224833 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Optimization of the store-and-generate based built-in self-testUbar, Raimund-Johannes; Jervan, Gert; Kruus, Helena; Orasson, Elmet; Aleksejev, IgorBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 199-202 : ill

Persoon : Gert JervanMänd, Krööt Grete; Jervan, GertStudioosus2019 / lk. 6-9

Power-constrained hybrid BIST test scheduling in an abort-on-first-fail test environmentHe, Zhiyuan; Jervan, Gert; Peng, Zebo; Eles, PetruProceedings : DSD'2005 : 8th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : Porto, Portugal, August 30 - September 3, 20052005 / p. 83-86 : ill

Profiling in deeply embedded systemsMoorits, Erkki; Jervan, GertBEC 2012 : 2012 13th Biennial Baltic Electronics Conference : proceedings of the 13th Biennial Baltic Electronics Conference : October 3-5, 2012, Tallinn, Estonia2012 / p. 127-230

Pühapäeval käivitatakse küberkuu suure võistlus- ja messipäevagapealinn.ee2023 Pühapäeval käivitatakse küberkuu suure võistlus- ja messipäevaga

QoT assessment of the optical spectrum as a service in disaggregated network scenariosKaeval, Kaida; Fehenberger, Tobias; Zou, Jim; Jansen, Sander Lars; Grobe, Klaus; Griesser, Helmut; Elbers, Jörg-Peter; Tikas, Marko; Jervan, GertJournal of Optical Communications and Networking2021 / art. 9436771, p. E1-E12 https://doi.org/10.1364/JOCN.423530 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/

Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

Respiration signal extraction from photoplethysmogram using pulse wave amplitude variationLeier, Mairo; Jervan, Gert; Stork, Wilhelm2014 IEEE International Conference on Communications (ICC) : Sydney, Australia, June 10-14, 2014


2014 / p. 3535-3540 : ill

Sardsüsteemide õppe- ja teaduslabor Tallinna Tehnikaülikooli arvutitehnika instituudisJervan, GertE-õppe uudiskiri2011 / lk. 9 : fot http://uudiskiri.e-ope.ee

Scalable open platform for reliable medical sensorics = Laiendatav avatud platvorm usaldusväärsete meditsiiniliste sensorite jaoksLeier, Mairo2016

Scheduling framework for dependable NoC-based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertWorkshop Digest. Diagnostic Services in Network-on-Chips - Test, Debug, and On-Line Monitoring : DATE 2009 : Nice, France, 20-24 April, 20092009 / ? p

Scheduling framework for real-time dependable NoC-based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertProceedings of the 11th International Conference on System-on-chip : Tampere, Finland, October 05-07, 20092009 / p. 95-99

Service margins for wide-band optical spectrum services implemented in long-haul Raman-enabled networksKaeval, Kaida; Patri, Sai Kireet; Pedreno-Manresa, Jose-Juan; Grobe, Klaus; Elbers, Jörg-Peter; Griesser, Helmut; Tikas, Marko; Jervan, GertOptical Fiber Communication Conference (OFC) 2023 : San Diego, California, United States, 5–9 March 20232023 / art. W3H.6 https://doi.org/10.1364/OFC.2023.W3H.6

A set of tools for estimating quality of built-in self-test in digital circuitsJervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the International Symposium on Signals, Circuits and Systems, Iasi (Romania), October 2-3, 19971997 / p. 362-365

Sleep apnea pre-screening on neonates and children with shoe integrated sensors [Electronic resource]Leier, Mairo; Jervan, Gert31st Norchip Conference : Vilnius, Lithuania, 11-12 November 2013 : conference program and papers2013 / [4] p. : ill [USB]

A small-size sleep apnea pre-screening prototype for neonates and childrenLeier, Mairo; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 49-52 : ill

Smart photoplethysmographic sensor for pulse wave registration at different vascular depthsLeier, Mairo; Jervan, Gert; Pilt, KristjanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 67-70 : ill

Smart photoplethysmographic sensor for pulse wave registration at different vascular depthsLeier, Mairo; Pilt, Kristjan; Karai, Deniss; Jervan, GertConference proceedings : 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society : Milan, Italy, August 25-29 20152015 / p. 1849-1852 : ill http://dx.doi.org/10.1109/EMBC.2015.7318741

SoCDep2 : a framework for dependable task deployment on many-core systems under mixed-criticality constraintsAzad, Siavoosh Payandeh; Niazmand, Behrad; Ellervee, Peeter; Raik, Jaan; Jervan, Gert; Hollstein, Thomas2016 11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC) : June 27‐29, 2016, Tallinn, Estonia2016 / [6] p. : ill https://doi.org/10.1109/ReCoSoC.2016.7533903

SysML in systems engineering courseKruus, Helena; Robal, Tarmo; Jervan, Gert10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 177-181 : ill

System level design for dependability and reliabilityJervan, GertCREDES Summer School : Dependable Systems Design : handouts2011 / p. 5-20 : ill

System level design of dependable real-time Systems-on-ChipTagel, Mihkel; Jervan, GertInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 77-80 : ill

System-level communication synthesis and dependability improvements for Network-on-Chip based systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertEstonian journal of engineering2010 / 1, p. 23-38 : ill https://artiklid.elnet.ee/record=b1964968*est

System-level design of NoC-based dependable embedded systemsTagel, Mihkel; Ellervee, Peeter; Jervan, GertDesign and test technology for dependable systems-on-chip2011 / p. 1-36 : ill

System-level design of timing-sensitive network-on-chip based dependable systems = Kiipvõrkudel põhinevate ajakriitiliste ja töökindlate süsteemide kõrgtaseme disainTagel, Mihkel2012 https://www.ester.ee/record=b2778263*est

System-level optimization of NoC-based timing sensitive systemsTagel, Mihkel; Ellervee, Peeter; Hollstein, Thomas; Jervan, GertEstonian journal of engineering2011 / 2, p. 158-168 : ill https://artiklid.elnet.ee/record=b2422982*est

Systems engineering course as a backbone of the computer engineering curriculaJervan, GertProceedings of the 24th International Conference on European Association for Education in Electrical and Information Engineering : 30-31 May 2013, Chania, Greece2013 / p. 163-166 : ill

Tallinna tehnikaülikooli uus näguOorn, Arvo; Jervan, Gert; Listra, Enn; Kanger, TõnisSirp2017 / lk. 33-35 : portr http://www.sirp.ee/s1-artiklid/c21-teadus/tallinna-tehnikaulikooli-uus-nagu/

TalTechDigital sai diginõukojaAaviksoo, Jaak; Gil, Gerlin; Helm, Marek; Jervan, Gert; Krimmer, Robert Johannes; Lackman, Seth; Otto, Tauno; Saar, Kirke; Sulling, Anne; Tammet, TanelMente et Manu2017 / lk. 26-30 http://www.ester.ee/record=b1242496*est

TalTechi aasta vilistlane, Testlio asutaja Kristel Kruustük: hirmutavad hetked suunavad õigele rajaledigi.geenius.ee2023 TalTechi aasta vilistlane, Testlio asutaja Kristel Kruustük: hirmutavad hetked suunavad õigele rajale

Teaching embedded systems as a part of a computer engineering curriculaJervan, Gert; Gorev, Maksim; Pesonen, Vadim23rd EAEEIE annual conference, Cagliari, Italy, February 26-27, 20122012 / p. 1-4

Teaching modeling in SysML/UML and problems encounteredKruus, Helena; Robal, Tarmo; Jervan, GertProceedings of the 25th International Conference on European Association for Education in Electrical and Information Engineering : 30 May-June 2014, Cesme, Türkiye2014 / p. 33-36 : ill

Teaching test and design for testability with TURBO-TESTER softwareJervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 3rd Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, May 19961996 / p. 589-594

Teaduses ja äris on samad põhimõttedJervan, GertÄripäev2019 / lk. 12

Tehisintellekt - millest kogu see kära?Jervan, GertMente et Manu2023 / lk. 57-58 : portr https://www.ester.ee/record=b1242496*est

Tehisintellekt – millest kogu see kära?Jervan, Gertdigi.geenius.ee2023 Tehisintellekt – millest kogu see kära?

Tehisintellekt on petturite elu veelgi lihtsamaks muutunudSaarniit, AleksandraPostimees2023 / Lk. 6 "Tehisintellekt on petturite elu veelgi lihtsamaks muutunud"

Tehnikahuvilisi noori võiks rohkem olla : [intervjuu TTÜ 2008. a. parima noorteadlase Gert Jervaniga]Jervan, Gert; Priilinn, KetlinInseneeria2009 / lk. 36-37 : fot

Test cost minimization for hybrid BISTJervan, Gert; Peng, Zebo; Ubar, Raimund-JohannesIEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : 25-27 October 2000, Yamanashi, Japan : proceedings2000 / p. 283-298 : ill

Test generation : a hierarchical approachJervan, Gert; Ubar, Raimund-Johannes; Peng, Z.; Eles, PetruSystem-level test and validation of hardware/software systems2005 / p. 67-81 : ill

Test time minimization for hybrid BIST of core-based systemsJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, Maksim12th Asian Test Symposium (ATS 2003) : 17-19 November 2003, Xian, China2003 / p. 318-325 : ill

Test time minimization for hybrid BIST of core-based systemsJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, MaksimJournal of computer science and technology2006 / 6, p. 907-912 : ill https://link.springer.com/article/10.1007/s11390-006-0907-x

Test time minimization for hybrid BIST with test pattern broadcastingUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, ZeboIEEE NORCHIP 2003 : 21 Norchip Conference : Riga, Latvia, 10-11 November 2003 : proceedings2003 / p. 112-116 : ill

Towards formal verification of cache access-based side-channel attacksNiazmand, Behrad; Reinbrecht, Cezar; Raik, Jaan; Jervan, Gert; Sepulveda, JohannaTestmethoden und Zuverlässigkeit von Schaltungen und Systemen, TUZ 20192019 / 2 p. : tab http://www.informatik.uni-bremen.de/tuz/2019

TTÜ aastal 2020 : töögrupi vahearuanneErnits, Juhan-Peep; Goi, Anna; Jervan, Gert; Leibak, Alar; Randma-Liiv, Tiina; Otto, Tauno; Rosin, Argo; Sarmiento Guerin, Maria CeciliaMente et Manu2009 / 16. veebr., lk. 4 : fot https://www.ester.ee/record=b1242496*est

TTÜ arengukonverents 8. juuni 2011 : ettekannete põhiteesidTruve, Erkki; Tammemäe, Kalle; Varrak, Tea; Öpik, Andres; Jervan, Gert; Lopp, Margus; Elken, Jüri; Kattel, Rainer; Keerberg, AnneMente et Manu2011 / lk. 5 https://www.ester.ee/record=b1242496*est

TTÜ professor: võidujooks parema tehisintellekti nimel on varjutanud eetikaOidermaa, Jaan-Juhannovaator.err.ee2023 TTÜ professor: võidujooks parema tehisintellekti nimel on varjutanud eetika

Turbo tester : a CAD system for teaching digital testJervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesMicroelectronics education : proceedings of the 2nd European Workshop held in Noordwijkerhout, The Netherlands, 14-15 May 19981998 / p. 287-290: ill

Uitmõtteid akadeemilisest juhtimisest : [arvamuslugu]Jervan, GertMente et Manu2013 / lk. 15 : fot https://www.ester.ee/record=b1242496*est

Understanding MPSoCs : exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCsSepulveda, Johanna; Azad, Siavoosh Payandeh; Niazmand, Behrad; Jervan, GertSAMOS '18 : Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece, July 15-19, 20182018 / p. 162-166 https://doi.org/10.1145/3229631.3239367 Conference proceedings at Scopus Article at Scopus Article at WOS

Using Tabu Search for optimization of memory-constrained hybrid BISTKruus, Helena; Jervan, Gert; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 85-88 : ill

Using Tabu Search for optimization of memory-constrained hybrid BISTKruus, Helena; Jervan, Gert; Ubar, Raimund-JohannesBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 155-158 : ill

Using Tabu search method for optimizing the cost of hybrid BISTKruus, Helena; Ubar, Raimund-Johannes; Jervan, Gert; Peng, Z.XVI Conference on Design of Circuits and Integrated Systems : Porto, Portugal, 20012001 / p. 445-450

VHDL based test generation systemJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 5th Electronic Devices and Systems Conference, Brno, June 11-12, 19981998 / p. 145-148