Acceleration of recursive data sorting over tree-based structuresMihhailov, Dmitri; Sudnitsõn, Aleksander; Sklyarov, Valery; Skliarova, IouliiaElektronika ir elektrotechnika = Electronics and electrical engineering2011 / p. 51-56 : ill https://eejournal.ktu.lt/index.php/elt/article/view/612 Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill Analysis and comparison of attainable hardware acceleration in all programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderEuromicro Conference on Digital System Design : DSD 2015 : 26-28 August 2015, Funchal, Madeira, Portugal : proceedings2015 / p. 345-352 : ill http://dx.doi.org/10.1109/DSD.2015.45 Application of extensible processing platforms for experiments with FPGA-based circuitsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, AleksanderMELECON 2014 : 2014 17th IEEE Mediterranean Electrotechnical Conference : 13-16 April 2014, Beirut, Lebanon2014 / p. 467-471 : ill Application-specific hardware accelerator for implementing recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of the IEEE International Conference on Field Programmable Technology (FPT'10) : Beijing, China Dec. 8-10, 20102010 / p. 269-272 : ill Computing sorted subsets for data processing in communicating software/hardware control systemsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderInternational journal of computers communications & control2016 / p. 126-141 : ill http://dx.doi.org/10.15837/ijccc.2016.1.1442 Design of FPGA-based circuits using hierarchical finite state machinesSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander2012 http://www.ester.ee/record=b2857138*est Design space exploration in multi-level computing systemsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderCompSysTech'14 : 15th International Conference on Computer Systems and Technologies : Ruse, Bulgaria, June 27-28, 20142014 / p. 40-47 : ill Fast data sort based on searching networks with ring pipelineSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2016 / p. 58-62 : ill http://dx.doi.org/10.5755/j01.eie.22.4.15920 Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systemsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderProceedings of the Estonian Academy of Sciences2017 / p. 323-335 : ill https://doi.org/10.3176/proc.2017.3.07 http://www.ester.ee/record=b2355998*est Fast matrix covering in all programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2014 / p. 150-153 : ill Fast processing of non-repeated values in hardwareSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2017 / p. 74-77 : ill http://dx.doi.org/10.5755/j01.eie.23.3.18336 FPGA-based accelerators for parallel data sortSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderApplied computer systems2014 / p. 53-63 : ill FPGA-based systems in information and communicationSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderAICT2011 : 5th International Conference on Application of Information and Communication Technologies : 12-14 October, Baku, Azerbaijan : conference proceedings2011 / p. 551-555 FPGA-based time and cost effective Hamming weight comparators for binary vectorsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, MargusProceedings : EUROCON 2015 : Salamanca, Spain, 8th-11th September2015 / p. 328-333 : ill http://dx.doi.org/10.1109/EUROCON.2015.7313700 Hardware accelerators for information retrieval and data miningSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, Aleksander; Rjabov, Artjom2015 International Conference on Information and Communication Technology Research (ICTRC2015) : Abu Dhabi, United Arab Emirates, May 17-19, 20152015 / p. 202-205 : ill http://dx.doi.org/10.1109/ICTRC.2015.7156457 Hardware implementation of recursive algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander53rd IEEE International Midwest Symposium on Circuits and Systems : Seattle, Washington, USA, August 1-4, 2010 : proceedings2010 / p. 225-228 Hardware implementation of recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2011 International Conference on Electronic Devices, Systems and Applications (ICEDSA) : Kuala Lumpur, Malaysia, April 25-27, 2011 : [proceedings]2011 / p. 33-38 : ill Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleidMihhailov, Dmitri2011 https://www.ester.ee/record=b2748823*est Hardware/software co-design for programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, Aleksander; Cardoso, Cláudia2014 http://www.ester.ee/record=b3087107*est Hardware/software co-design in extensible processing platforms for combinatorial search algorithmsSkliarova, Iouliia; Sklyarov, Valery; Rjabov, Artjom; Sudnitsõn, AleksanderMELECON 2014 : 2014 17th IEEE Mediterranean Electrotechnical Conference : 13-16 April 2014, Beirut, Lebanon2014 / p. 462-466 : ill High-performance hardware accelerators for sorting and managing prioritiesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, AleksanderProceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany2011 / p. 313-318 : ill High-performance information processing in distributed computing systemsSklyarov, Valery; Rjabov, Artjom; Skliarova, Iouliia; Sudnitsõn, AleksanderInternational journal of innovative computing, information and control2016 / p. 139-160 : ill Implementation in FPGA of address-based data sortingSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander21st International Conference on Field Programmable Logic and Applications : FPL 2011 : Chania, Crete, Greece, 5-7 September 20112011 / p. 405-410 : ill Implementation of address-based data sorting on different FPGA platformsSudnitsõn, Aleksander; Mihhailov, Dmitri; Sklyarov, Valery; Skliarova, IouliiaProceedings of IEEE East-West Design & Test Symposium (EWDTS’2012) : Kharkov, Ukraine, September 14–17, 20122012 / p. 38-41 Implementation of parallel operations over streams in extensible processing platformsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, Aleksander2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) : August 4-7, 2013, Columbus, Ohio : [proceedings]2013 / p. 852-855 : ill Implementation of sorting algorithms in reconfigurable hardwareSkliarova, Iouliia; Sklyarov, Valery; Mihhailov, Dmitri; Sudnitsõn, Aleksander2012 IEEE Mediterranean Electrotechnical Conference (MELECON 2012) : Yasmine Hammamet, Tunisia, March 25-28, 20122012 / p. 107-110 : ill Integration of high-level synthesis to the courses on reconfigurable digital systemsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, Margus2015 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) : May 25-29, 2015, Opatija, Croatia : proceedings2015 / p. 166-171 : ill http://dx.doi.org/10.1109/MIPRO.2015.7160258 Interactions of Zynq-7000 devices with general purpose computers through PCI-express : a case study [Electronic resource]Rjabov, Artjom; Sudnitsõn, Aleksander; Sklyarov, Valery; Skliarova, IouliiaProceedings of the 18th Mediterranean Electrotechnical Conference MELECON 2016 : 18-20 April 2016, Limassol, Cyprus2016 / [4] p. : ill. [CD-ROM] https://doi.org/10.1109/MELCON.2016.7495400 Methodology and international collaboration in teaching reconfigurable systemsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderThe 2012 IEEE Global Engineering Education Conference (IEEE EDUCON 2012), Marrakesh, Morocco, Apr. 17-20, 20122012 / p. 1143-1152 : ill Multilevel models for data processingSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 IEEE GCC Conference and Exhibition (GCC) : February 19-22, 2011, Dubai, United Arab Emirates2011 / p. 136-139 Network-based hardware accelerators for parallel data processing = Võrgupõhised riistvarakiirendid paralleelseks andmetöötluseksRjabov, Artjom2017 https://digi.lib.ttu.ee/i/?8436 Optimization of address-based data sorting unit with external memory supportMihhailov, Dmitri; Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderCompSysTech'13 : proceedings of the 14th International Conference on Computer Systems and Technologies2013 / p. 83-90 : ill Optimization of FPGA-based circuits for recursive data sortingMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 129-132 : ill Optimization of recursive sorting algorithms for implementation in hardwareMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderProceedings of 22nd International Conference on Microelectronics (ICM 2010) : Cairo, Egypt, Dec. 19-22, 20102010 / p. 471-474 : ill Parallel FPGA-based implementation of recursive sorting algorithmsMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) : Cancun, Mexico, December 13-15, 20102010 / p. 121-126 : ill Parallel processing in FPGA-based digital circuits and systemsSklyarov, Valery; Skliarova, Iouliia2013 http://www.ester.ee/record=b2946103*est Performance evaluation for FPGA-based processing of tree-like structuresSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander19th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Sevilla, Spain, December 9-12, 20122012 / p. 217-220 : ill https://ieeexplore.ieee.org/document/6463762 Processing N-ary trees in hardware circuitsSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander13th International Symposium on Integrated Circuits (ISIC) : Singapore, 12-14 December 2011 : proceedings2011 / p. 262-265 : ill Processing N-ary trees in reconfigurable hardwareSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2013 25th International Conference on Microelectronics (ICM) : 15–18 December 2013, Beirut-Lebanon2013 / p. 13-16 : ill Processing sorted subsets in a multi-level reconfigurable computing systemRjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2015 / p. 30-33 : ill http://dx.doi.org/10.5755/j01.eee.21.2.11509 Processing tree-like data structures for sorting and managing prioritiesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 IEEE Symposium on Computers & Informatics : ISCI 2011 : Kuala Lumpur, Malaysia, 20-23 March 20112011 / p. 322-327 Processing tree-like data structures in different computing platformsSklyarov, Valery; Skliarova, Iouliia; Oliveira, Ramiro; Mihhailov, Dmitri; Sudnitsõn, Aleksander2011 International Conference on Information and Computer Applications (ICICA 2011) : Dubai, United Arab Emirates, March 18-20, 20112011 / p. 112-116 : ill RAM-based mergers for data sort and frequent item computation [Electronic resource]Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2017 40th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), May 22 - 26, 2017, Opatija, Croatia : proceedings2017 / p. 176-181 : ill. [CD-ROM] http://dx.doi.org/10.23919/MIPRO.2017.7973413 Reconfigurable systems in engineering education : best practices and future trendsSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusProceedings of 2017 IEEE Global Engineering Education Conference (EDUCON) : 25-28 April 2017, Athens, Greece2017 / p. 1084-1088 : ill https://doi.org/10.1109/EDUCON.2017.7942983 Recursion and hierarchy in digital design and prototyping : a case studyMihhailov, Dmitri; Kruus, Margus; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderComputer Systems and Technologies : 12th International Conference, CompSysTech'11 : Vienna, Austria, June 16-17, 2011 : proceedings2011 / p. 45-50 : ill Solving computationally intensive problems in reconfigurable hardware : a case studySkliarova, Iouliia; Vallejo, Tiago; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusJournal of convergence information technology (JCIT) : an international journal2013 / p. 601-609 : ill Synthesis and implementation of hierarchical finite state machines with implicit modulesSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) : Cancun, Mexico, December 13-15, 20102010 / p. 436-441 : ill Zynq-based system for extracting sorted subsets from large data setsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderJournal of microelectronics, electronic components and materials2015 / p. 142-152 : ill Teaching FPGA-based systemsSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, Margus2014 IEEE Global Engineering Education Conference (EDUCON) : Istanbul, Turkey, April 2-5, 20142014 / p. 460-469 : ill Using mobile technology to enhance teaching reconfigurable systemsSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusProceedings of 2013 IEEE International Conference on Teaching, Assessment and Learning for Engineering (TALE)2013 / p. 478-483 : ill