Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill

Advanced topics of FSM design using FPGA educational boards and web-based toolsSudnitsõn, Aleksander; Mihhailov, Dmitri; Kruus, MargusEast-West Design & Test Symposium : Moscow, September 18-21, 20092009 / p. 446-449 https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5742086

Applying FPGA partial reconfiguration for digital system simulationArhipov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 145-148 : ill

An area aware accelerator for elliptic curve point multiplicationImran, Malik; Pagliarini, Samuel Nascimento; Rashid, Muhammad Haroon27th IEEE International Conference on Electronics Circuits and Systems, (ICECS) 2020, Glasgow, UK, Virtual Conference, November 23-25, 2020 : proceedings2020 / 4 p https://doi.org/10.1109/ICECS49266.2020.9294908

Clock manipulation for heterogeneous emulation environmentEllervee, Peeter; Arhipov, Anton; Tammemäe, KalleProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 213-216 : ill https://ieeexplore.ieee.org/abstract/document/4126984

Combining multiple sound sources localization hybrid algorithm and fuzzy rule based classification for real-time speaker tracking applicationIbala, Christian; Astapov, Sergei; Riid, AndriInternational journal of microelectronics and computer science2013 / p. 12-25 : ill

Design of FPGA-based circuits using hierarchical finite state machinesSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, Aleksander2012 http://www.ester.ee/record=b2857138*est

Division algorithms - from past to present chance to improve area time and complexity for digital applicationsPatankar, Udayan Sunil; Flores, Miguel E.; Koel, AntsLAEDC 2020 : Latin American Electron Devices Conference, San José, Costa Rica, February 25-28, 20202020 / 4 p https://doi.org/10.1109/LAEDC49063.2020.9073050

EEG analyzer prototype based on FPGAJenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011) : September 4-6, 2011, Dubrovnik, Croatia : proceedings2011 / p. 101-106 : ill

An efficient FPGA-based architecture for contractive autoencodersKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 3 – 6 May 2020, Fayetteville, Arkansas : proceedings2020 / p. 230−230 https://doi.org/10.1109/FCCM48280.2020.00062.

Environment for fault simulation acceleration on FPGAEllervee, Peeter; Raik, Jaan; Tihhomirov, ValentinBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 217-220 : ill

Fast processing of non-repeated values in hardwareSkliarova, Iouliia; Sklyarov, Valery; Sudnitsõn, AleksanderElektronika ir elektrotechnika = Electronics and electrical engineering2017 / p. 74-77 : ill http://dx.doi.org/10.5755/j01.eie.23.3.18336

FPGA-based critical computing : TEMPUS and FP7 projects issuesKharchenko, Vyacheslav; Vain, Jüri; Krispin, Madli10th European Workshop on Microelectronics Education : EWME 2014 : May 14-16, 2014, Tallinn, Estonia2014 / p. 74-79 : ill

FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est

FPGA-based time and cost effective Hamming weight comparators for binary vectorsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, MargusProceedings : EUROCON 2015 : Salamanca, Spain, 8th-11th September2015 / p. 328-333 : ill http://dx.doi.org/10.1109/EUROCON.2015.7313700

Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleidMihhailov, Dmitri2011 https://www.ester.ee/record=b2748823*est

Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendinaAbideen, Zain Ul2024 https://digikogu.taltech.ee/et/Item/660d923b-44d2-4993-898f-324ab2088199 https://www.ester.ee/record=b5649944*est https://doi.org/10.23658/taltech.1/2024

Network-based hardware accelerators for parallel data processing = Võrgupõhised riistvarakiirendid paralleelseks andmetöötluseksRjabov, Artjom2017 https://digi.lib.ttu.ee/i/?8436

Neutral-point-clamped quasi-Z-source inverter with field-programmable gate array based controlStepenko, Serhii; Husev, Oleksandr; Vinnikov, Dmitri12th International Symposium "Topical Problems in the Field of Electrical and Power Engineering." Doctoral School of Energy and Geotechnology II : Kuressaare, Estonia, June 11-16, 20122012 / p. 76-77 : ill

A new FPGA-based detection method for spurious variations in PCBA power distribution networkOdintsov, Sergei; Bozzoli, Ludovica; De Sio, Corrado; Sterpone, Luca; Jutman, Artur2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 6 p. : ill https://doi.org/10.1109/DDECS.2019.8724662

Novel architectures for contractive autoencoders with embedded learningKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 17th Biennial Baltic electronics conference, Tallinn, Estonia, October 6-8, 2020 : proceedings2020 / 6 p. : ill https://doi.org/10.1109/BEC49624.2020.9277246

Open source on-chip logic analyzer for FPGA-sEhrenpreis, Lauri; Ellervee, Peeter; Tammemäe, KalleBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 99-102 : ill

Optimization of address-based data sorting unit with external memory supportMihhailov, Dmitri; Rjabov, Artjom; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderCompSysTech'13 : proceedings of the 14th International Conference on Computer Systems and Technologies2013 / p. 83-90 : ill

Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill http://dx.doi.org/10.1007/s10836-016-5588-y

Optimization of FPGA-based circuits for recursive data sortingMihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderBEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia2010 / p. 129-132 : ill

Parallel processing in FPGA-based digital circuits and systemsSklyarov, Valery; Skliarova, Iouliia2013 http://www.ester.ee/record=b2946103*est

Performance evaluation for FPGA-based processing of tree-like structuresSklyarov, Valery; Skliarova, Iouliia; Mihhailov, Dmitri; Sudnitsõn, Aleksander19th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Sevilla, Spain, December 9-12, 20122012 / p. 217-220 : ill https://ieeexplore.ieee.org/document/6463762

Processing N-ary trees in reconfigurable hardwareSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander2013 25th International Conference on Microelectronics (ICM) : 15–18 December 2013, Beirut-Lebanon2013 / p. 13-16 : ill

PSL assertion checkers synthesis with ASM based HLS tool ABELITEJenihhin, Maksim; Baranov, Samary; Raik, Jaan; Tihhomirov, ValentinLATW 2012 : 13th IEEE Latin-American Test Workshop proceedings : April 10th-13th, 2012, Quito, Ecuador2012 / [6 p.] : ill https://ieeexplore.ieee.org/document/6261251

Real-time regulation of beam-based feedback : implementing an FPGA solution for a continuous wave linear acceleratorMaalberg, Andrei; Kuntzsch, Michael; Petlenkov, EduardSensors2022 / art. 6236, 22 p. : ill https://doi.org/10.3390/s22166236 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Solving computationally intensive problems in reconfigurable hardware : a case studySkliarova, Iouliia; Vallejo, Tiago; Sklyarov, Valery; Sudnitsõn, Aleksander; Kruus, MargusJournal of convergence information technology (JCIT) : an international journal2013 / p. 601-609 : ill

Systematic unsupervised recycled field-programmable gate array detectionIsaka, Yuya; Shintani, Michihiro; Ahmed, Foisal; Inoue, MichikoIEEE transactions on device and materials reliability2022 / 10 p. : ill https://doi.org/10.1109/TDMR.2022.3164788 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Unsupervised recycled FPGA detection using symmetry analysisTarique, Tanvir Ahmad; Ahmed, Foisal; Jenihhin, Maksim; Ali, Liakot12th International Conference on Electrical and Computer Engineering : ICECE 20222022 / p. 437-440 https://doi.org/10.1109/ICECE57408.2022.10088856

Ways for board and system test to benefit from FPGA embedded instrumentationEhrenberg, Heiko; Odintsov, Sergei; Devadze, Sergei; Jutman, Artur; Aleksejev, Igor; Wenzel, Thomas2019 IEEE AUTOTESTCON2019 / 10 p : ill https://doi.org/10.1109/AUTOTESTCON43700.2019.8961057