A tool for random test generation targeting high diagnostic resolutionOsimiry, Emmanuel Ovie; Kostin, Sergei; Raik, Jaan; Ubar, Raimund-JohannesBEC 2016 : 2016 15th Biennial Baltic Electronics Conference : proceedings of the 15th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 3-5, 2016, Tallinn, Estonia2016 / p. 79-82 : ill http://www.ester.ee/record=b2150914*est

AC measurement converters : analog and digital solutionsMärtens, Olev2000 http://www.ester.ee/record=b1707866*est

Algorithms for hierarchical fault simulation in digital systemsUbar, Raimund-Johannes; Raik, Jaan; Klüver, B.Proceedings of the 10th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2003 : Lodz, Poland, 26-28 June 20032003 / p. 530-535 : ill

Alternative graph based test design in digital systemsUbar, Raimund-JohannesProceedings of 11. NORCHIP seminar, Trondheim, Nov. 9-10, 19931993 / p. 48-62

Alternative graphs and test pattern design in digital systemsUbar, Raimund-JohannesProc. of the 6th Workshop on New Directions for Testing, Montreal, Canada, May 20-22, 19921992

Applying FPGA partial reconfiguration for digital system simulationArhipov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 145-148 : ill

Asynchronous e-learning resources for hardware design issuesJutman, Artur; Sudnitsõn, Aleksander; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichProceedings of the International Conference on Computer Systems and Technologies (e-learning) : CompSysTech'04 : Rousse, Bulgaria, 17-18 June2004 / p. IV.11-1 - IV.11-6 : ill https://www.researchgate.net/publication/234797327_Asynchronous_e-learning_resources_for_hardware_design_issues

At-speed on-chip diagnosis of board-level interconnect faultsJutman, ArturNinth IEEE European Test Symposium : ETS 2004 : 23-26 May 2004, Corsica, France : proceedings2004 / p. 2-7 : ill https://www.researchgate.net/publication/4098807_At-speed_on-chip_diagnosis_of_board-level_interconnect_faults

At-speed testing and test quality evaluation for high-performance pipelined systems Töökiirusel testimine ja testi kvaliteedi hindamine kõrgjõudlus-konveierarhitektuuriga süsteemideleGorev, Maksim2015 https://digi.lib.ttu.ee/i/?3953

Automated correction of design errors by edge redirection on high-level decision diagramsKarputkin, Anton; Ubar, Raimund-Johannes; Tombak, Mati; Raik, Jaan13th International Symposium on Quality Electronic Design (ISQED), 20122012 / p. 686-693 : ill https://ieeexplore.ieee.org/document/6113980

Automated test bench generation for high-level synthesis flow ABELITEViilukas, Taavi; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Baranov, SamaryProceedings of IEEE East-West Design & Test Symposium (EWDTS'2011) : Sevastopol, Ukraine, September 9-12, 20112011 / p. 13-16 : ill https://ieeexplore.ieee.org/document/6116601

Berechnung von tests für die Fehlerdiagnose in DigitalsystemUbar, Raimund-JohannesInternationales wissenschaftliches Kolloquium, 21. 1. November bis 5. November 1976, H. 2: Vortragsreihe A 2: Entwurf, Analyse und Einsatz von informationsverarbeitenden Systemen: IWK1976 / p. [?]

Bringing research issues into lab scenarios on the example of SoC testing [Electronic resource]Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei; Wuttke, Heinz-DietrichInternational Conference on Engineering Education - ICEE 2007 : September 3-7, 2007, Coimbra, Portugal2007 / [7] p. : ill. [CD-ROM] http://icee2007.dei.uc.pt/proceedings/papers/429.pdf

CAD für Digitaltechnik - eine Programmfamilie für den Entwurf von Testmustern zum Test von DigitalschaltungenUbar, Raimund-JohannesIBM Hochschulkongress '92: Offene Grenzen - offene Systeme, Dresden, 30.09-2.10.19921992 / S.IV9 1-14

Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanMicroprocessors and microsystems2020 / art. 103117, 12 p https://doi.org/10.1016/j.micpro.2020.103117 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Combining functional and structural approaches in test generation for digital systemsUbar, Raimund-JohannesMicroelectronics reliability1998 / 3, p. 317-329 : ill

Comparison of two approaches to improve functional BIST fault coverageKostin, Sergei; Ubar, Raimund-Johannes; Gorev, Maksim; Mägi, GunnarBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 105-108 : ill

Conditional fault collapsing in digital circuits with shared structurally synthesized BDDs [Online resource]Jürimägi, Lembit; Ubar, Raimund-JohannesBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p. : ill https://doi.org/10.1109/BEC.2018.8600967

Decision diagrams - from a mathematical notion to engineering applicationsStankovic, Radomir S.; Ubar, Raimund-Johannes; Astola, JaakkoFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 281-301 : ill http://dx.doi.org/10.2298/FUEE1103281S

Deductive fault simulation on structurally synthesized BDDsAarna, Margit; Ubar, Raimund-Johannes; Raik, JaanBEC 2004 : Baltic Electronics Conference : Post-Graduate Student Session : Tallinn University of Technology, October 3-6, 2004, Tallinn, Estonia2004 / p. 11 : ill

Defect-oriented mixed-level fault simulation in digital systemsUbar, Raimund-Johannes; Raik, Jaan; Ivask, Eero; Brik, MarinaFacta Universitatis [Niš]. Series electronics and energetics2002 / 1, April, p. 123-136 : ill

Design and verification of Cyber-Physical Systems using TrueTime, evolutionary optimization and UPPAALBalasubramaniyan, Sreram; Srinivasan, Seshadhri; Buonopane, Furio; Balasubramanian, Subathra; Vain, Jüri; Ramaswamy, SriniMicroprocessors and microsystems2016 / p. 37-48 : ill http://dx.doi.org/10.1016/j.micpro.2015.12.006

Design error diagnosis using backtrace algorithm on decision diagramsRepinski, Urmas; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, AntonInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis2010 / p. 93-96

Diagnostic modelling of digital systems with decision diagramsUbar, Raimund-JohannesВестник Томского государственного университета : приложение2004 / август, материалы международных, всесоюзных и региональных научных конференций, симпозиумов, школ, проводимых в ТГУ, с. 174-179 : ил

Diagnostic modelling of digital systems with multi-level decision diagramsUbar, Raimund-Johannes; Raik, Jaan; Evartson, Teet; Kruus, Margus; Lensen, HarriProceedings of the 17th IASTED International Conference on Modelling and Simulation : May 24-26, 2006, Montreal, Quebec, Canada2006 / p. 207-212 : ill

Digievolutsiooni võimalused kooliharidusesJürjo, SilvesterStudioosus2015 / lk. 20-21 https://www.ester.ee/record=b1558644*est

Digitaalseadmete simuleerimine : õppemetoodiline vahend1989 https://www.ester.ee/record=b1221053*est

Digitaalseadmete struktuuri projekteerimine : õppevahendAriste, Andri1978 https://www.ester.ee/record=b1305228*est

Digitaalsüsteemide diagnostikaUbar, Raimund-Johannes2005 http://www.ester.ee/record=b2097071*est

Digitaalsüsteemide diagnostika Tallinna TehnikaülikoolisUbar, Raimund-JohannesTeadusmõte Eestis : tehnikateadused2002 / lk. 107-113 : ill

Digitaaltehnika doktorantidele. Osa II, Kombinatsioon- ja järjendlülitused = Digital engineering. Part II, Combinational and sequential circuits [Võrguväljaanne]Lehtla, Madis2014 http://egdk.ttu.ee/files/2014/Digitaaltehnika_doktorantidele2.pdf

DigitaalteleviisoridSchults, EduardSide. Raadio. Televisioon : infoseeria 101984 / lk. 8-10 : ill https://www.ester.ee/record=b1232303~S1*est

Digital electronics design and test at Computer Engineering Department of Tallinn University of TechnologyUbar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Ellervee, PeeterThe house magazine : the parlamentary weekly2006 / 1198, p. 42 : ill

Digital last planner system whiteboard for enabling remote collaborative design process planning and controlPikas, Ergo; Pedo, Barbara; Tezel, Algan; Koskela, Lauri; Veersoo, MarkusSustainability2022 / art. 12030 https://doi.org/10.3390/su141912030 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

A digital measuring module for tool wear estimationOtto, Tauno; Kurik, Lembit; Papstel, JüriDAAAM international scientific book 20032003 / p. 435-444

Digital object memory based monitoring and assistance applications in manual work stationAruväli, Tanel14th International Symposium "Topical problems in the field of electrical and power engineering. Doctoral school of energy and geotechnology. II" : Pärnu, Estonia, January 13-18, 20142014 / p. 274-276 : ill

Digital synthesis tools for education and researchFomina, Jelena; Ellervee, Peeter; Kruus, Margus; Sudnitsõn, Aleksander; Tammemäe, KalleProc. 18th International Conference on Systems for Automation of Engineering and Research (SAER'2004)2004 / p. 160-164

Double phase fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Josifovska, Galina; Oyeniran, Adeboye StephenDSD 2015 : 18th Euromicro Conference on Digital Systems Design : 26-28 August 2015, Funchal, Madeira, Portugal2015 / p. 700-705 : ill

Effect of keysight 3458A jitter on precision of phase difference measurementPokatilov, Andrei; Kübarsepp, Toomas; Vabson, ViktorIEEE transactions on instrumentation and measurement2016 / p. 2595-2600 : ill https://doi.org/10.1109/TIM.2016.2593965

Embedded diagnosis in digital systemsUbar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan2008 26th International Conference on Microelectronics : Niš, Serbia, 11-14 May 2008 : proceedings. Vol. 22008 / p. 421-424 : ill

Embedded diagnosis in digital systemsKostin, SergeiInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 81-84 : ill

Embedded fault diagnosis in digital systems with BISTUbar, Raimund-Johannes; Kostin, Sergei; Raik, JaanMicroprocessors and microsystems2008 / 5/6, p. 279-287 : ill

Environment for the analysis of functional self-test quality in digital systemsUbar, Raimund-Johannes; Kostin, Sergei; Kruus, Helena; Aarna, Margit; Devadze, SergeiProceedings of the Estonian Academy of Sciences2014 / p. 151-162 : ill https://artiklid.elnet.ee/record=b2673964*est

Equivalent transformations of structurally synthesized BDDs and applicationsJürimägi, Lembit; Ubar, Raimund-Johannes; Viies, Vladimir2019 8th Mediterranean Conference on Embedded Computing (MECO)2019 / 6 p. : ill https://doi.org/10.1109/MECO.2019.8760283

Estonia huku uurimine jätkub, kuigi valitsus pole lisaraha veel eraldanud [Võrguväljaanne]Linnart, Marterr.ee2022 Estonia huku uurimine jätkub, kuigi valitsus pole lisaraha veel eraldanud

EUROCHIP - kursus digitaalsüsteemide kõrgtaseme sünteesist : [Leuven, Belgia : aug.-sept.]Tammemäe, KalleArvutustehnika ja Andmetöötlus1994 / 11, lk. 15-21

Evaluation of the latency components in MPEG-4 DVB-T systemÄniline, JannoInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 77-80

Fault simulation and code coverage analysis of RTL designs using high-level decision diagrams = Rikete simuleerimine ja koodikatte analüüs register-siirde tasemel kasutades kõrgtaseme otsustusdiagrammeReinsalu, Uljana2013 https://www.ester.ee/record=b2963595*est

Fault simulation of digital systems = Digitaalsüsteemide rikete simuleerimineDevadze, Sergei2009 https://digi.lib.ttu.ee/i/?445 https://www.ester.ee/record=b2508727*est

Foreword to the 12th IEEE DDECS SymposiumPliva, Zdenek; Manhaeve, Hans; Renovell, Michel; Novak, Ondrej; Ubar, Raimund-Johannes; Drabkova, JindraProceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 15-17, 2009, Liberec, Czech Republic2009 / p. iii http://dx.doi.org/10.1109/DDECS.2009.5012081

Formal verification and error correction on high-level decision diagrams = Formaalne verifitseerimine ja vigade parandamine kõrgtasemelistel otsustusdiagrammidelKarputkin, Anton2012

FPGA based fault emulation of synchronous sequential circuitsEllervee, Peeter; Raik, Jaan; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings [of] 22nd NORCHIP Conference : Oslo, Norway, 8-9 November 20042004 / p. 59-62 https://ieeexplore.ieee.org/abstract/document/1423822

Functional level test set generation methodsUbar, Raimund-JohannesProceedings of the 12th Conference on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 19891989 / p. 46-55

Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill http://dx.doi.org/10.1016/j.micpro.2014.11.002

Functional specification and testing of digital systemsUbar, Raimund-JohannesMultimicroprocessor systems: Proceedings of the 3rd Symposium, Stralsund, oct. 16-20, 1989, Vol 11989 / p. 207-217

Genetic algorithm approach to the problem of finite state machine constructionSpitšakova, MargaritaInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 69-72 : ill

Guide to the digital switchoverNyman-Metcalf, Katrin Merike; Richter, Andrei2010 https://www.osce.org/files/f/documents/8/c/73720.pdf

Hierarchical test generation for complex digital systems with control and data processing partsUbar, Raimund-Johannes; Raik, Jaan"Test, Assembly and Packaging" : SEMICON Technical Symposium : Singapur, May 3-6, 19991999 / p. 43-52

Hierarchical test generation. SEMI show slidesUbar, Raimund-Johannes; Raik, Jaan"Test, Assembly and Packaging" : SEMICON Technical Symposium : Singapur, May 3-6, 19991999 / p. 53-64

Hierarchical test synthesis for digital systems using alternative graph modelUbar, Raimund-JohannesQuantitative aspects of designing and validating dependable computing systems1995

High level fault modeling in digital systemsUbar, Raimund-Johannes; Aarna, Margit; Brik, Marina; Raik, JaanSynergies between Information and Automation : 49. Internationales Wissenschaftliches Kolloquium, 27.-30.9.2004, Technische Universität Ilmenau, Germany. Volume 22004 / p. 486-491

High quality test generation for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, JaanRomanian journal of information science and technology2005 / 1, p. 73-84 : ill

High-Level Decision Diagram manipulations for code coverage analysisMinakova, Karina; Reinsalu, Uljana; Tšepurov, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 207-210 : ill

How to generate high quality tests for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, Jaan2004 International Semiconductor Conference : 27th edition, October 4-6, 2004, Sinaia, Romania : CAS 2004 proceedings. Volume 22004 / p. 459-462 : ill http://dx.doi.org/10.1109/SMICND.2004.1403048

Hybrid functional BIST for digital systemsMazurova, Natalja; Smahtina, Julia; Ubar, Raimund-JohannesBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 205-208 : ill

Implementation of Digital Twins for electrical energy conversion systems in selected case studiesRassõlkin, Anton; Orosz, Tamas; Demidova, Galina; Kuts, Vladimir; Rjabtšikov, Viktor; Vaimann, Toomas; Kallaste, AntsProceedings of the Estonian Academy of Sciences2021 / p. 19-39 : ill https://doi.org/10.3176/proc.2021.1.03 https://doi.org/wp-content/plugins/kirj/pub/proc-1-2021-19-39_20210201183802.pdf Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Improved VHDL input for high-level synthesis tool xTractorEllervee, Peeter; Ivask, Eero; Kruus, MargusBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 87-90 : ill

Insener projekteerib usaldust : [ka TTÜ arvutitehnika instituudi töödest]Ubar, Raimund-JohannesArvutimaailm2011 / 7/8, lk. 8-9 : ill https://artiklid.elnet.ee/record=b2423013*est

Integration of high-level synthesis to the courses on reconfigurable digital systemsSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, Aleksander; Kruus, Margus2015 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) : May 25-29, 2015, Opatija, Croatia : proceedings2015 / p. 166-171 : ill http://dx.doi.org/10.1109/MIPRO.2015.7160258

Kiiruse mõõtmise mobiilne süsteem : aastal 2009 avaldatud tööde koopiate kogumik. 13Laaneots, Rein2009 https://www.ester.ee/record=b2641827*est

Kvaliteetsema digiõppe poolePuust, RaidoPostimees2021 / Lk. 14 https://dea.digar.ee/article/postimees/2021/05/13/12.10

Logic and system design of digital systemsBaranov, Samary; Keevallik, Andres2008 https://www.ester.ee/record=b2358322*est

Mehaanika ja tööstustehnika instituudis valmivad elumuutvad lahendused [Võrguväljaanne]Alver, Anne-MariEesti Päevaleht2022 / Lk. 10 Mehaanika ja tööstustehnika instituudis valmivad elumuutvad lahendused

Methods for improving the accuracy and efficiency of fault simulation in digital systems = Meetodid digitaalsüsteemide rikete simuleerimise täpsuse ja efektiivsuse tõstmiseksKõusaar, Jaak2019 https://digi.lib.ttu.ee/i/?11667

Millest tekkisid parvlaeva Estonia augud? Laevaehituse insener : teeme esimesi katsearvutusiRiik, Marvelohtuleht.ee2023 / Lk. 2 Millest tekkisid parvlaeva Estonia augud? Laevaehituse insener: teeme esimesi katsearvutusi

Mixed-level test generator for digital systemsBrik, Marina; Jervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering1997 / 4, p. 271-282 : ill

Model synthesis from VHDL for the functional test generation systemKrupnova, Helena1993 https://www.ester.ee/record=b2090509*est

MS Estonia ferry investigation continues, no additional funds yet allocated [Online resources]Linnart, Martnews.err.ee2022 MS Estonia ferry investigation continues, no additional funds yet allocated

Multi-level fault simulation of digital systems on decision diagramsUbar, Raimund-Johannes; Raik, Jaan; Ivask, Eero; Brik, MarinaThe First IEEE International Workshop on Electronic Design, Test and Applications : DELTA 2002, 29-31 January 2002, Christchurch, New Zealand : proceedings2002 / p. 86-91 : ill

Multi-level test generation and fault diagnosis in digital systemsUbar, Raimund-Johannes1992

Multiple fault testing in systems-on-chip with high-level decision diagramsUbar, Raimund-Johannes; Oyeniran, Adeboye Stephen; Schölzel, Mario; Vierhaus, Heinrich TheodorProceedings of 2015 10th International Design & Test Symposium (IDT) : Dead Sea, Jordan, 14-16 December 20152015 / p. 66-71 : ill http://dx.doi.org/10.1109/IDT.2015.7396738

Multivalued simulation on AG-model of digital devicesUbar, Raimund-Johannes; Voolaine, AndrusProceedings of the 12th Conference on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 19891989 / p. 101-104

Mutation-based verification and error correction in high-level designs = Mutatsioonidel põhinev verifitseerimine ja vigade parandamine kõrgtaseme skeemidesHantson, Hanno2015

Mõtteid koostöö võimalikkusest Ida-Lääne piirilUbar, Raimund-Johannes; Kruus, MargusMente et Manu2003 / 20. okt., lk. 2 : portr https://artiklid.elnet.ee/record=b1415646*est

Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill http://dx.doi.org/10.1007/s10836-016-5588-y

Optimization of memory-constrained hybrid BIST for testing core-based systemsJervan, Gert; Kruus, Helena; Orasson, Elmet; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 133-136 : ill

Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systemsUbar, Raimund-JohannesFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 303-324 : ill http://dx.doi.org/10.2298/FUEE1103303U

Overview about low-lewel and high-level decision diagrams for diagnostic modeling of digital systemsUbar, Raimund-JohannesProceedings of the Reed-Muller 2011 Workshop : May 25-26, 2011, Tuusula, Finland2011 / p. 1-10 : ill

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichMicroelectronics education : proceedings of the 5th European Workshop on Microelectronics Education, held in Lausanne, Switzerland, April 15-16, 20042004 / p. 253-258 : ill https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich5th European Workshop on Microelectronics Education - EWME 2004, Lausanne, 20042004 / p. 173-176 https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

Parallel fault simulation in digital circuitsAarna, Margit; Raik, Jaan; Ubar, Raimund-JohannesProc. of 42nd International Scientific Conference of Riga Technical University2001 / p. 91-94

Parallel fault simulation in digital circuitsAarna, Margit; Raik, Jaan; Ubar, Raimund-JohannesScientific proceedings of Riga Technical University. 7. serija, Telecommunications and electronics2001 / p. 91-94 : ill

PSL assertions based verification with HLDD toolsJenihhin, MaksimInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 17-20 : ill

Register transfer low power design based on controller decompositionSudnitsõn, AleksanderMIEL 2004 : 24th International Conference on Microelectronics : Niš, Serbia and Montenegro, 16-19 May 2004 : proceedings. Volume 22004 / p. 735-738 : ill https://ieeexplore.ieee.org/document/1314937

Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/

Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

Ringhääling '99 : VI Rahvusvahelise Telekommunikatsioonipäeva konverentsi ettekannete materjalid1999 https://www.ester.ee/record=b1260725*est

Ringhääling 2003 : X rahvusvahelise telekommunikatsioonipäeva materjalid : [16. mai 2003, Tallinn]2003 http://www.ester.ee/record=b1782571*est

Scalable algorithm for structural fault collapsing in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, Jaan2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 5-7, 2015, Daejeon, Korea2015 / p. 171-176 : ill

Second IEEE East-West Design and Test WorkshopHahanov, Vladimir; Ubar, Raimund-JohannesIEEE journal of design & test of computers2004 / p. 594

Selected issues of modeling, verification and testing of digital systemsJutman, Artur2004 https://www.ester.ee/record=b1989760*est

Self-diagnosis in digital systems = Isediagnoosivad digitaalsüsteemidKostin, Sergei2012 https://www.ester.ee/record=b2757857*est

Self-testing of pipe-lined signal processing architectures at-speedGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 25-28 : ill

Sissejuhatus digitaaltehnikasseLehtla, Madis2016 http://www.ester.ee/record=b4618200*est

Small and medium-sized seaports on the digital track : tracing digitalisation across the South Baltic region by innovative auditing proceduresPhilipp, Robert; Gerlitz, Laima; Moldabekova, AisuluReliability and statistics in transportation and communication : Selected Papers from the 19th International Conference on Reliability and Statistics in Transportation and Communication, RelStat’19, 16-19 October 2019, Riga, Latvia2020 / p. 351-362 https://doi.org/10.1007/978-3-030-44610-9_35 Article collection metrics at Scopus Article at Scopus

Some new aspects of digital filteringTrump, Tõnu1993 http://www.ester.ee/record=b1065194*est

Some new aspects of digital filtering : a thesis ... for the degree of doctor of engineeringTrump, Tõnu1993 http://www.ester.ee/record=b2677070*est

Structurally synthesized multiple input BDDs for simulation of digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, Artur16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009 : Yasmine Hammamet, Tunesia, 13-19 December, 20092009 / p. 451-454 : ill http://dx.doi.org/10.1109/ICECS.2009.5410895

Symbolic test generation for hierarchically modeled digital systemsZaugarov, Viktor1993 https://www.ester.ee/record=b2090336*est

Synthesis of high-level decision diagrams for functional test pattern generationUbar, Raimund-Johannes; Raik, Jaan; Karputkin, Anton; Tombak, MatiProceedings of the 16th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2009 : Lodz, Poland, 25-27 June, 20092009 / p. 519-524 : ill

Synthesis of testable FSM through decompositionDevadze, Sergei; Sudnitsõn, AleksanderInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 101-104 : ill

Teaching advanced test issues in digital electronicsUbar, Raimund-Johannes; Orasson, Elmet; Raik, Jaan; Wuttke, Heinz-DietrichProceedings of the 6th IEEE International Conference on Information Technology Based Higher Education and Training : ITHET : July 7-9, 2005, Juan Dolio, Dominican Republic2005 / p. S2B-1 - S2B-6 : ill http://dx.doi.org/10.1109/ITHET.2005.1560318

Teaching diagnostic modeling of digital systems with decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Raik, Jaan; Mironov, Dmitri; Evartson, Teet; Orasson, Elmet; Aarna, Margit; Wuttke, Heinz-DietrichProceedings of 12th IASTED International Conference on Computers and Advanced Technology in Education - CATE 2009 : St.Thomas, US, November 22-24, 20092009 / p. 1-6. [CD-ROM]

Teaching research in the laboratory using diagnosis environment for digital systemsKostin, Sergei; Ubar, Raimund-Johannes; Raik, Jaan; Aarna, Margit; Brik, Marina; Wuttke, Heinz-Dietrich2009 EAEEIE annual conference : 20th Annual Conference of the European Association for Education in Electrical and Information Engineering : Valencia, Spain, June 22-24, 20092009 / p. 280-283 https://ieeexplore.ieee.org/document/5335462

Tehted digitaalseadmeis : õppeabimaterjalAriste, Andri1976 https://www.ester.ee/record=b1292367*est

Test generation for digital systemsUbar, Raimund-JohannesDigest of papers - FTCS 13th Annual International Symposium on Fault-Tolerant Computing, June 28 - 30, 1983, Milano, Italy1983 / p. 374-377

Test generation for digital systems at functional levelUbar, Raimund-Johannes; Kuchcinski, Ktzysztof; Peng, Z.Research report LiTH-IDA-R-90-06, Linköping University, Sweden1990 / p. 1-21

Test generation for digital systems based on alternative graphsUbar, Raimund-JohannesDependable Computing - EDCC-1 : First European Dependable Computing Conference, Berlin, Germany, October 1994 : proceedings1994 / p. 151-164: ill

Testability analysis of digital design verificationHahanov, V.; Kaminska, M.; Fomina, JelenaBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 171-174 : ill

The current state of voice over Internet protocol in wireless mesh networksMeeran, Mohammad Tariq; Annus, Paul; Le Moullec, Yannick2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : September 21-24, 2016, The LNM Institute of Information Technology (LNMIT), Jaipur, India2016 / p. 2567-2575 : ill https://doi.org/10.1109/ICACCI.2016.7732444

The increasing role of digital technologies in co-production [Online resource]Lember, Veiko2017 http://technologygovernance.eu/files/main//2017090403424444.pdf

True path tracing in structurally synthesized BDDs for testability analysis of
digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Oyeniran, Adeboye Stephen; Jenihhin, MaksimEuromicro Conference on Digital System Design : DSD 2019 : 28 - 30 August 2019
Kallithea, Chalkidiki, Greece : proceedings2019 / p. 492-499 : ill https://doi.org/10.1109/DSD.2019.00077

TTBist: a DfT tool for enhancing functional test for SoCHermann, K.; Raik, Jaan; Jenihhin, MaksimBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 191-194 : ill

Using simulation statistics for bug localization in RTL designsTihhomirov, Valentin; Jenihhin, Maksim; Raik, JaanInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 107-110 : ill

Using test pattern generation tool decider in hardware verificationViilukas, Taavi; Raik, JaanInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 166-169 : ill

Uued meetodid digitaalsüsteemide disaini ja diagnostika valdkonnas : kommentaar Eesti Vabariigi teaduse aastapreemia pälvinud tööleUbar, Raimund-JohannesTallinna Tehnikaülikooli aastaraamat 19981999 / lk. 142-145

Web-based tool for FSM encoding targeting low-power FPGA implementationMihhailov, Dmitri; Sudnitsõn, Aleksander; Tarletski, Konstantin2010 27th International Conference on Microelectronics : MIEL 2010 : Niš, Serbia, 16-19 May 2010 : proceedings2010 / p. 349-352 https://ieeexplore.ieee.org/document/5490468

WebTT - digitaalskeemide testimine ja diagnostikaalaste õppelaborite e-keskkond : [TTÜ arvutitehnika instituut esitles e-Ülikooli konverentsil kolme õppetöös kasutatavat süsteemi]Robal, Tarmo; Orasson, ElmetMente et Manu2005 / 5. mai, lk. 5 : fot https://www.ester.ee/record=b1242496*est

Vektorielle alternative graphen und Fehlerdiagnose für digitale SystemeUbar, Raimund-JohannesNachrichtentechnik, Elektronik : technisch-wissenschaftlishe Zeitschrift für die gesamte elektronische Nachrichtentechnik1981 / p. 25-28 : ill https://www.ester.ee/record=b1550811*est

Verification and error correction on High-Level Decision DiagramsKarputkin, Anton2013

Verification formelle des resultats de la synthese de Haut Niveau : [doktoriväitekiri]Dušina, Julia1999

VHDL based test generation systemJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 5th Electronic Devices and Systems Conference, Brno, June 11-12, 19981998 / p. 145-148

Über einige Probleme der Testsatzanalyse für digitale SystemeUbar, Raimund-JohannesNachrichtentechnik, Elektronik : technisch-wissenschaftlishe Zeitschrift für die gesamte elektronische Nachrichtentechnik1977 / p. 149-150 https://www.ester.ee/record=b1550811*est

Über einige Probleme der Testsatzanalyse für digitale SystemeUbar, Raimund-JohannesWissenschaftliche Zeitschrift1976 / p. 447-449 https://www.ester.ee/record=b1516616*est

Автоматизация поверки цифровых вольтметровMägi, Harri; Rüstern, EnnuТруды по электротехнике и автоматике : сборник статей. 121974 / с. 95-102 : илл https://www.ester.ee/record=b2190668*est https://digikogu.taltech.ee/et/Item/57b94a1f-6879-4443-b6f2-322fd7e53d89

Автоматический синтез тестов для диагностики цифровых устройствLohuaru, Tõnu; Pall, Martin; Ubar, Raimund-JohannesEesti NSV Teaduste Akadeemia toimetised. Füüsika. Matemaatika = Известия Академии наук Эстонской ССР. Физика. Математика = Proceedings of Academy of Sciences of the Estonian SSR. Physics. Mathematics1983 / lk. 84-94 https://www.ester.ee/record=b1264310*est

Анализ диагностических тестов для комбинационных цифровых схем методом обратного прослеживания неисправностейUbar, Raimund-JohannesАвтоматика и телемеханика1977 / с. 168-176 https://www.ester.ee/record=b1515055*est

Быстродействующее устройство выборки и храненияGurjanov, Boris; Lavrov, Mihhail; Tamm, UljasВсесоюзный симпозиум «Проблемы цифрового кодирования и преобразования изображений», г. Тбилиси, 1980 г. : тезисы докладов и программа1980 / [с. ?]

Генерирование групповых тестов для цифровых схем на модели альтернативных графовKivi, E.; Ubar, Raimund-JohannesТезисы докладов XXXI студенческой научно-технической конференции1980 / с. 52-55 https://www.ester.ee/record=b1319482*est

Генерирование тестов для комбинационных схем с кратными неисправностямиUbar, Raimund-JohannesВопросы проектирования и расчета автоматических информационных систем : [Сборник статей]1978 / с. 6-10

Дедуктивной анализ тестов в синхронных цифровых схемах без обратных связейViilup, Agu; Kitsnik, Peeter; Ubar, Raimund-JohannesМатериалы конференции "Автоматизация технического проектирования ЦВМ" (май-июнь 1977 г.)1977 / с. 178-181

Декомпозиционный метод синтеза контролепригодных цифровых автоматовKruus, MargusМашинное проектирование электронных устройств и систем1986 / с. 52-56

Единый подход к синтезу тестов цифровых схем и системUbar, Raimund-JohannesМежреспубликанская школа-семинар по технической диагностике, 8-12 октября 1984 года : тезисы докладов1984 / с. 75-81 : илл https://www.ester.ee/record=b1237891*est

Интегрирующие цифровые электромагнитные расходомерыGerasimtšuk, Valeri; Meister, Ants4 Symposium Maritime Elektronik, Messelektronik, 20-22. Apr. 1983, Rostok1983 / S. 36-44

Интегрирующие цифровые электромагнитные расходомерыGerasimtšuk, Valeri; Meister, AntsIX Таллинское совещание по электромагнитным расходомерам : тезисы докладов1982 / с.34 https://www.ester.ee/record=b1309155*est

Исследование и разработка методов анализа диагностических тестов для цифровых схем : автореферат ... кандидата технических наук (05.13.01)Kitsnik, Peeter1981 https://www.ester.ee/record=b1337813*est

Исследование и разработка методов анализа диагностических тестов для цифровых схем : диссертация на соискание ученой степени кандидата технических наук (05.13.01)Kitsnik, Peeter1980 https://www.ester.ee/record=b4632972*est

Исследование и разработка методов управления поиском дефектов в цифровых схемах : автореферат .... кандидата технических наук (05.13.01)Evartson, Teet1986 https://www.ester.ee/record=b1301665*est

О генерировании тестов цифровых схем в реальном времениGrigorjeva, Ksenja; Ubar, Raimund-JohannesXVII областная научно-техническая конференция по вопросам повышения эффективности и качества систем и средств управления (май 1981 года) : тезисы докладов1981 / с. 112

О системе алгоритмов цифровых устройствJänes, MartМетоды машинного проектирования цифровых устройств и систем : материалы краткосрочного семинара, 14-15 июня1977 / с. 5-8

Об автоматическом синтезе тестов для цифровых объектов систем управленияPlakk, Mari; Ubar, Raimund-JohannesVII Всесоюзное совещание по проблемам управления, Минск, 21-25 ноября 1977. Кн. 31977 / с. 97-98

Об одном подходе к моделированию цифровых схем, содержащих счетные структурыEvartson, Teet; Mištšenko, AndreiПроектирование и диагностика вычислительных средств1987 / с. 53-63 : илл https://www.ester.ee/record=b1273275*est

Оптимизация процессов диагностирования цифровых устройств в реальном времениGrigorjeva, Ksenja; Lohuaru, Tõnu; Evartson, Teet; Ubar, Raimund-JohannesВычислительная техника : тезисы докладов республиканской конференции "Автоматизированное техническое проектирование электронной аппаратуры" (1–2 июня 1982 г.)1982 / с. 144

Организация процесса анализа тестов цифровых схем на модели альтернативных графовVoolaine, Andrus; Kitsnik, Peeter; Pall, MartinВычислительная техника : тезисы докладов республиканской конференции "Автоматизированное техническое проектирование электронной аппаратуры" (1–2 июня 1982 г.)1982 / с. 34-35

Организация тестовых экспериментов цифровых систем на основе модели альтернативных графовLohuaru, TõnuМежреспубликанская школа-семинар по технической диагностике, 8-12 октября 1984 года : тезисы докладов1984 / с. 47-52 https://www.ester.ee/record=b1237891*est

Персональная среда проектирование цифровых системRaud, Rein; Lohuaru, Tõnu; Ubar, Raimund-JohannesАвтоматизация проектирования электронной аппаратуры : Межвузовский тематический научный сборник1989 / с. 39-43

Проектирование контролепригодных дискретных систем : учебное пособиеUbar, Raimund-Johannes1988 https://www.ester.ee/record=b1225400*est

Профессиональная среда проектирования цифровых системRaud, R.; Lohuaru, Tõnu; Ubar, Raimund-JohannesАвтоматизация проектирования электронной аппаратуры : межвузовский тематический научный сборник1989 / с. 39-43

Решение задач диагностики цифровых устройств модели альтернативных графовKurilova, L.; Popova, S.; Tulina, M.; Ubar, Raimund-Johannes; Jakubovitš, M.XXV студенческая научно-техническая конференция вузов Прибалтийских республик, Белорусской ССР и Молдавской ССР, 21-23 апреля 1981 года : тезисы докладов. Том 2, Автоматика. Энергетика. Механика. Химия1981 / с. 39 https://www.ester.ee/record=b1322629*est

Синтез тестов для цифровых схемPlakk, Mari; Ubar, Raimund-JohannesXIV областная научно-техническая конференция по системам и средствам управления (май 1978 г.) : тезисы докладов1978 / с. 78-79

Система автоматизированной поверки АЦП и ЦВ Е 101Rüstern, Ennu; Takis, N.Аналого-цифровые и цифро-аналоговые преобразователи : тезисы докладов Республиканской научно-технической конференции, посвященной дню радио, в октябре 1983 года : секция: прецизионные аналого-цифровые и цифро-аналоговые преобразователи1983 / с. 67-69 : ил https://www.ester.ee/record=b1373964*est

Структурные схемы и алгоритмы работы цифровых систем регулированияKracht, WilhelmXX научная конференция, посвященная 25-летию Эстонской ССР 18-22 мая 1965 г. : тезисы и резюме1965 / с. 65 https://www.ester.ee/record=b1359832*est

Тестовая диагностика цифровых устройств : учебное пособие. II, Синтез и анализ тестов. Дешифрация диагностических экспериментовUbar, Raimund-Johannes1981 https://www.ester.ee/record=b1326795*est

Управление процессом пойска дефектов в цифровых схемах содержащих счётные структурыViilup, Agu; Ubar, Raimund-Johannes; Evartson, TeetМежреспубликанская школа-семинар по технической диагностике, 8-12 октября 1984 года : тезисы докладов1984 / с. 28-32 https://www.ester.ee/record=b1237891*est

Электротехника и автоматикаKukk, Vello; Voolaine, Andrus; Jõgi, Aksel; Pall, Martin; Ubar, Raimund-Johannes; Kitsnik, Peeter; Toomsalu, Arvo; Grigorjeva, Ksenja; Lohuaru, Tõnu; Evartson, Teet; Božitš, V.I.; Galujev, G.A.; Sudnitsõn, Aleksander; Berkman, Boriss; Rang, Toomas; Velmre, Enn1982 https://www.ester.ee/record=b1328194*est