High-level combined deterministic and pseudo-exhuastive test generation for RISC processorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Gürsoy, Cemil Cem; Raik, Jaan2019 IEEE European Test Symposium (ETS) : proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791526 High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC ProcessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan2019 IEEE European Test Symposium (ETS) : ETS 2019, May 27-31, 2019, Baden-Baden, Germany : Proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791526 Implementation-independent test generation for a large class of faults in RISC processor modulesJenihhin, Maksim; Oyeniran, Adeboye Stephen; Raik, Jaan; Ubar, Raimund-Johannes24th Euromicro Conference on Digital System Design (DSD)2021 https://doi.org/10.1109/DSD53832.2021.00090