Architectural solutions for high-speed data processing demands of CERN LHC detectors with FPGA and high-level synthesis
author
Devadze, Sergei
Nielsen, Christine Elizabeth
Mihhailov, Dmitri
Ellervee, Peeter
statement of authorship
Sergei Devadze, Christine Elizabeth Nielsen, Dmitri Mihhailov, Peeter Ellervee
source
2024 IEEE Nordic Circuits and Systems Conference (NorCAS)
location of publication
Piscataway, New Jersey
publisher
IEEE
year of publication
2024
conference name, date
10th IEEE Nordic Circuits and Systems Conference, NORCAS 2024, 29-30 October 2024
conference location
Lund
url
https://doi.org/10.1109/NorCAS64408.2024.10752490
subject term
andmetöötlus
integraallülitused
algoritmid
detektorid
Scopus
https://www.scopus.com/record/display.uri?eid=2-s2.0-85211955157&origin=resultslist&sort=plf-f&src=s&sot=b&sdt=b&s=TITLE%28%22Architectural+Solutions+for+High-Speed+Data+Processing+Demands+of+CERN+LHC+Detectors+with+FPGA+and+High-Level+Synthesis%22%29&sessionSearchId=fa5e22e6b6020c2cc124a3eadf2fa9d1&relpos=0
keyword
architecture exploration
data processing
design exploration
FPGA
high-level synthesis
HLS
ISBN
979-833151766-3
notes
Bibliogr.: 12 ref
Open Access
Open Access
scientific publication
teaduspublikatsioon
classifier
3.1
TalTech department
arvutisüsteemide instituut
language
inglise