Extensible open-source framework for translating RTL VHDL IP cores to SystemC
author
Saif Abrar, Syed
Jenihhin, Maksim
Raik, Jaan
statement of authorship
Syed Saif Abrar, Maksim Jenihhin, Jaan Raik
source
Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 8-10, 2013, Karlovy Vary, Czech Republic
location of publication
Piscataway
publisher
IEEE
year of publication
2013
pages
p. 112-115
conference name, date
2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), April 8-10, 2013
conference location
Karlovy Vary, Czech Republic
subject term
VHDL (programmeerimiskeel)
SystemC (programmeerimiskeel)
arvuti arhitektuur
keyword
VHDL
SystemC
RTL
ISBN
978-1-4673-6133-0
notes
Bibliogr.: 20 ref
TalTech department
arvutitehnika instituut
language
inglise