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A security verification template to assess cache architecture vulnerabilities

author
source
2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 22nd – 24th 2020 Novi Sad, Serbia : Proceedings
location of publication
Danvers
publisher
year of publication
pages
art. 9095707, 6 p
conference name, date
23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), April 22nd – 24th 2020
conference location
Novi Sad, Serbia
url
ISBN
978-1-7281-9938-2
notes
Bibliogr.: 36 ref
TTÜ department
language
inglise
Reserch Group
Centre of dependable computing systems
Ghasempouri, T., Raik, J., Paul, K., Reinbrecht, C., Hamdioui, S., Taouil, M. A security verification template to assess cache architecture vulnerabilities // 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 22nd – 24th 2020 Novi Sad, Serbia : Proceedings. Danvers : IEEE, 2020. art. 9095707, 6 p. https://doi.org/10.1109/DDECS50862.2020.9095707