Hierarchical fault simulation in digital systems
statement of authorship
R.Ubar, J.Raik, E.Ivask, M.Brik
source
International Symposium on Signals, Circuits and Systems : SCS 2001 : July 10-11, 2001, Iasi, Romania : proceedings
location of publication
Iasi
publisher
Gh. Asachi
year of publication
pages
p. 181-184 : ill
ISBN
973-8050-99-5
notes
Bibliogr.: 8 ref
Ubar, R., Raik, J., Ivask, E., Brik, M. Hierarchical fault simulation in digital systems // International Symposium on Signals, Circuits and Systems : SCS 2001 : July 10-11, 2001, Iasi, Romania : proceedings. Iasi : Gh. Asachi, 2001. p. 181-184 : ill.