print

Latch-Based logic locking

author
Sweeney, J.
Mohammed Zackriya, V.
Pagliarini, Samuel Nascimento
Pileggi, Larry
statement of authorship
Joseph Sweeney, Mohammed Zackriya V, Samuel Pagliarini, and Lawrence Pileggi
source
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020
location of publication
Danvers
publisher
IEEE
year of publication
2020
pages
p. 132−141 : ill
conference name, date
2020 IEE International Symposium on Hardware Oriented Security and Trust (HOST), 7-11 Dec. 2020
conference location
San Jose, CA, USA
url
https://doi.org/10.1109/HOST45689.2020.9300256
subject term
turvalisus
turvameetmed
integraallülitused
keyword
latches
integrated circuit modeling
delays
clocks
propagation delay
logic gates
security
notes
Bibliogr.: 27 ref
scientific publication
teaduspublikatsioon
classifier
3.1
TTÜ department
arvutisüsteemide instituut
language
inglise
Uurimisrühm
Centre for hardware security
Sweeney, J., Mohammed Zackriya, V., Pagliarini, S., Pileggi, L. Latch-Based logic locking // Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020. Danvers : IEEE, 2020. p. 132−141 : ill. https://doi.org/10.1109/HOST45689.2020.9300256