FSMD RTL design manipulation for clock interface abstraction
author
Abrar, Syed Saif
Jenihhin, Maksim
Raik, Jaan
statement of authorship
Syed Saif Abrar, Maksim Jenihhin, Jaan Raik
source
2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 10-13 August 2015, Kerala, India
location of publication
[S.l.]
publisher
IEEE
year of publication
2015
pages
p. 463-468 : ill
conference name, date
2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI), 10-13 August, 2015
conference location
Kerala, India
url
http://dx.doi.org/10.1109/ICACCI.2015.7275652
subject term
arukad süsteemid
süsteemide projekteerimine
SystemC (programmeerimiskeel)
kompuutermodelleerimine
kompuutersimulatsioon
keyword
Register Transfer Level - RTL
Algorithmic State Machine - ASM
Finite State Machine - FSM
SystemC
abstraction
simulation
modelling
ISBN
978-1-4799-8790-0
notes
Bibliogr.: 22 ref
TalTech department
arvutitehnika instituut
language
inglise