Module level defect simulation in digital circuits

statement of authorship
Wieslaw Kuzmicz, Witold Pleskacz, Jaan Raik, nd Raimund Ubar
journal volume number month
7
year of publication
pages
4, p. 253-268
ISSN
1406-0175
notes
Bibliogr.: 10 ref
review
Kokkuvõte: Digitaalskeemide defektide simuleerimine moodultasandil
language
inglise
Kuzmicz, W., Pleskacz, W., Raik, J., Ubar, R.-J. Module level defect simulation in digital circuits // Proceedings of the Estonian Academy of Sciences. Engineering (2001) 7, 4, p. 253-268.