Bubennikov, A., Blinnik, S. - TalTech Research Portal

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Design and optimization of super-speed CMOS/CBiCMOS circuits based on TCAD and time-logical simulator

author

Bubennikov, Alexander

Blinnik, Semen B.

statement of authorship

A.Bubennikov, S.Blinnik

source

BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings

location of publication

[Tallinn]

year of publication

1996

pages

p. 473-474: ill

ISBN

9985-59-026-0

notes

Bibl. 4 ref

language

inglise

Märksõnad ja võtmesõnad

subject term

integraallülitused

simulaatorid

mudelid

optimeerimine

Bubennikov, A., Blinnik, S. Design and optimization of super-speed CMOS/CBiCMOS circuits based on TCAD and time-logical simulator // BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings. [Tallinn], 1996. p. 473-474: ill.