TransMem : a memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs
statement of authorship
Muhammad Adeel Tajammul, Syed M. A. H. Jafri, Ahmed Hemani, Peter Ellervee
source
2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation : PATMOS 2016 : September, 21st to 23th 2016, Bremen, Germany : proceedings
location of publication
[S.l.]
publisher
year of publication
pages
p. 92-99 : ill
conference name, date
26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), September 21-23, 2016
conference location
Bremen, Germany
ISBN
978-1-5090-0733-2
notes
Bibliogr.: 40 ref
TTÜ department
language
inglise
subject term
Tajammul, M.A., Jafri, S.M.A.H., Hemani, A., Ellervee, P. TransMem : a memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs // 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation : PATMOS 2016 : September, 21st to 23th 2016, Bremen, Germany : proceedings. [S.l.] : IEEE, 2016. p. 92-99 : ill.