Model reduction in VLSI circuit design

author
Rogoza, V.S.
statement of authorship
Rogoza V.S
location of publication
Tallinn
year of publication
pages
p. 113-119: ill
notes
Bibl. 6 ref
review
Kokkuvõte: Mudelite redutseerimine suure integratsiooniastmega ahelate disaini puhul
language
inglise