Abstraction of clock interface for conversion of RTL VHDL to SystemC
statement of authorship
Syed Saif Abrar, Maksim Jenihhin, Jaan Raik
source
2014 IEEE International Advance Computing Conference (IACC) : February 21-22, 2014, Gurgaon, India
location of publication
Piscataway
publisher
year of publication
pages
p. 50-55 : ill
conference name, date
2014 IEEE International Advance Computing Conference, February 21-22, 2014
conference location
Gurgaon, India
ISBN
978-1-4799-2571-1
notes
Bibliogr.: 19 ref
TTÜ department
language
inglise
Saif Abrar, S., Jenihhin, M., Raik, J. Abstraction of clock interface for conversion of RTL VHDL to SystemC // 2014 IEEE International Advance Computing Conference (IACC) : February 21-22, 2014, Gurgaon, India. Piscataway : IEEE, 2014. p. 50-55 : ill.