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A 4-Stage pipelined architecture for point multiplication of binary huff curves

variant title
A 4-Stage pipelined architecture for point multiplication of binary huff curves
author
Rashid, Muhammad Imran
Imran, Malik
Jafri, Atif Raza
Mehmood, Zahid
statement of authorship
Muhammad Rashid, Malik Imran, Atif Raza Jafri, and Zahid Mehmood
source
publisher
journal volume number month
vol. 29, 11
year of publication
pages
art. 2050179
url
ISSN
0218-1266
notes
Bibliogr.: 32 ref
scientific publication
teaduspublikatsioon
language
inglise
subject term
keyword
pipelined architecture
throughput over area ratio
binary huff curves (BHC)
point multiplication
FPGA implementation
classifier
1.1
Scopus
Scopus
Reserch Group
Centre for hardware security
Rashid, M., Imran, M., Jafri, A. R., Mehmood, Z. A 4-Stage pipelined architecture for point multiplication of binary huff curves // Journal of circuits, systems, and computers (2020) vol. 29, 11, art. 2050179. https://doi.org/10.1142/S0218126620501790