Ying, H., Jaiswal, A., Abd El Ghany, M. A., Hollstein, T., Hofmann, K.

A simulation framework for 3-dimension networks-on-chip with different vertical channel density configurations

author

Ying, Haoyuan

Jaiswal, Ashok

Abd El Ghany, Mohamed A

Hollstein, Thomas

Hofmann, Klaus

statement of authorship

Haoyuan Ying, Ashok Jaiswal, Mohamed A Abd El Ghany, Thomas Hollstein and Klaus Hofmann

source

Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia

location of publication

[S. l.]

publisher

IEEE

year of publication

2012

pages

p. 83-88 : ill

conference name, date

IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), April 18-20, 2012

conference location

Tallinn

subject term

transistorid

kolmemõõtmeline ruum

integraallülitused

keyword

3D NoC

vertical channel density (VD)

Performance

Power Delay Product (PDP)

Figure of Merit (FOM)

ISBN

978-1-4673-1185-4

notes

Bibliogr.: 37 ref

language

inglise

Ying, H., Jaiswal, A., Abd El Ghany, M. A., Hollstein, T., Hofmann, K. A simulation framework for 3-dimension networks-on-chip with different vertical channel density configurations // Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia. [S. l.] : IEEE, 2012. p. 83-88 : ill.