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Bottlenecks in hardware design and design automation (Hardware synthesis: no pain, no gain) (title)
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book article
Bottlenecks in hardware design and design automation (Hardware synthesis: no pain, no gain)
Ellervee, Peeter
CREDES Summer School : Dependable Systems Design : handouts
2011
/
p. 49-58 : ill
book article
Number of records 1, displaying
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keyword
46
1.
hardware design
2.
hardware/software co-design
3.
design automation
4.
electronic design automation
5.
design methodology and human-centred design
6.
communicating hardware/software systems
7.
communicating software/hardware systems
8.
computer hardware
9.
Computer software and hardware
10.
crypto-hardware
11.
DNN hardware accelerator
12.
Embedded hardware
13.
hardware
14.
hardware acceleration
15.
hardware accelerator
16.
hardware close programming
17.
hardware customization
18.
hardware for the IoT
19.
hardware implementation
20.
hardware in the loop
21.
hardware Obfuscation
22.
hardware problems
23.
hardware rejuvenation
24.
hardware reliability
25.
hardware security
26.
hardware security primitive
27.
Hardware Trojan
28.
hardware trojan horse
29.
Hardware Trojan Horses
30.
hardware trojans
31.
Hardware Trojans (HT)
32.
Hardware Verification
33.
hardware-in-the loop simulation
34.
hardware-in-the-loop
35.
Hardware-in-the-Loop simulation
36.
integer-only hardware
37.
open hardware
38.
open source hardware
39.
opensource hardware
40.
open-source hardware
41.
power-hardware-in-the-loop
42.
reconfigurable hardware
43.
software/hardware partitioning
44.
software/hardware systems
45.
special-purpose hardware
46.
trustworthy hardware
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