Adjustable self-healing methodology for accelerated functions in heterogeneous systemsRiazati, Mohammad; Ghasempouri, Tara; Daneshtalab, Masoud; Raik, Jaan; Sjodin, Mikael; Lisper, Bjorn2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / p. 638-645 https://doi.org/10.1109/DSD51259.2020.00104

An automatic approach to evaluate assertions' quality based on data-mining metricsGhasempouri, Tara; Niazmand, Behrad; Raik, JaanProceedings 2nd IEEE International Test Conference in Asia : ITC-Asia 2018, 15-17 August 2018, Harbin, China2018 / p. 61-66 : ill https://doi.org/10.1109/ITC-Asia.2018.00021

An automated method for mining high-quality assertion setsHeidari Iman, Mohammadreza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, TaraMicroprocessors and microsystems2023 / art. 104773 https://doi.org/10.1016/j.micpro.2023.104773

CLD : an accurate, cost-effective and scalable run-time Cache Leakage DetectorShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : Vienna, Austria, 07-09 April 20212021 / p. 127-132 : ill https://doi.org/10.1109/DDECS52668.2021.9417071

Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemideleHariharan, Ranganathan2019 https://digi.lib.ttu.ee/i/?12854

Design understanding : from logic to specificationFey, Goerschwin; Ghasempouri, Tara; Jacobs, Swen; Raik, JaanProceedings of the 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 8-10, 2018, Verona, Italy2018 / p. 172–175 : ill https://doi.org/10.1109/VLSI-SoC.2018.8644732

Engineering of an effective automatic dynamic assertion mining platformGhasempouri, Tara; Malburg, Jan; Danese, Alessandro; Pravadelli, Graziano; Fey, Goerschwin; Raik, JaanVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 111-116 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920331

Exploring factors in a crossroad dataset using cluster-based association rule miningShahin, Mahtab; Heidari Iman, Mohammadreza; Kaushik, Minakshi; Sharma, Rahul; Ghasempouri, Tara; Draheim, DirkProcedia Computer Science : The 13th International Conference on Ambient Systems, Networks and Technologies (ANT) / The 5th International Conference on Emerging Data and Industry 4.0 (EDI40)2022 / p. 231-238 https://doi.org/10.1016/j.procs.2022.03.032 Conference Proceedings at Scopus Article at Scopus

From RTL liveness assertions to cost-effective hardware checkersHariharan, Ranganathan; Ghasempouri, Tara; Niazmand, Behrad; Raik, JaanXXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings2018 / 6 p. : ill https://doi.org/10.1109/DCIS.2018.8681487

A hierarchical approach for devising area efficient concurrent online checkersNiazmand, Behrad; Azad, Siavoosh Payandeh; Ghasempouri, Tara; Raik, Jaan; Jervan, GertProceedings 2nd IEEE International Test Conference in Asia : ITC-Asia 2018, 15-17 August 2018, Harbin, China2018 / p. 139-144 : ill https://doi.org/10.1109/ITC-Asia.2018.00034

IMMizer : an innovative cost-effective method for minimizing assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jervan, Gert; Ghasempouri, TaraProceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 20222022 / p. 671 - 678 https://doi.org/10.1109/DSD57027.2022.00095 Article at Scopus Article at WOS

LiD-CAT: A lightweight detector for cache ATtacksReinbrecht, Cezar; Hamdioui, Said; Taouil, Mottaqiallah; Niazmand, Behrad; Ghasempouri, Tara; Raik, Jaan; Sepulveda, Johanna2020 IEEE European Test Symposium (ETS) : ETS 2020, May 25-29, 2020
Tallinn, Estonia : proceedings2020 / 6 p. : ill https://doi.org/10.1109/ETS48528.2020.9131603

A methodology for automated mining of compact and accurate assertion setsHeidari Iman, Mohammadreza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, Tara2021 IEEE Nordic Circuits and Systems Conference (NorCAS) : Oslo, Norway, October 26-272021 / 7 p. : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9599865 https://doi.org/10.1109/NorCAS53631.2021.9599865

NV-SP: A new high performance and low energy NVM-Based scratch padShalabi, Ameer; Paul, Kolin; Ghasempouri, Tara; Raik, Jaan2020 IEEE Computer Society Annual Symposiumon VLSI : ISVLSI 2020, 6–8 July 2020, Limassol, Cyprus2020 / art. 19876866, p. 54−59 https://doi.org/10.1109/ISVLSI49217.2020.00020

Reusing verification assertions as security checkers for Hardware Trojan detectionEslami, Mohammad; Ghasempouri, Tara; Pagliarini, Samuel Nascimento2022 23rd International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA : 06-07 April 20222022 / p. 1-6 : ill https://doi.org/10.1109/ISQED54688.2022.9806292

RTL assertion mining with automated RTL-to-TLM abstractionGhasempouri, Tara; Danese, Alessandro; Pravadelli, Graziano; Bombieri, Nicola; Raik, JaanProceedings of the 2019 Forum on specification & Design Languages (FDL)2019 / 8 p. : ill https://doi.org/10.1109/FDL.2019.8876941

SCAAT: Secure cache alternative address table for mitigating cache logical side-channel attacksShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / art, 20035366, p. 213−217 https://doi.org/10.1109/DSD51259.2020.00043

A security verification template to assess cache architecture vulnerabilitiesGhasempouri, Tara; Raik, Jaan; Paul, Kolin; Reinbrecht, Cezar; Hamdioui, Said; Taouil, M.2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), April 22nd – 24th 2020 Novi Sad, Serbia : Proceedings2020 / art. 9095707, 6 p https://doi.org/10.1109/DDECS50862.2020.9095707

Towards multidimensional verification : where functional meets non-functionalJenihhin, Maksim; Lai, Xinhui; Ghasempouri, Tara; Raik, Jaan2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore2018 / 7 p. : ill https://doi.org/10.1109/NORCHIP.2018.8573495

Understanding multidimensional verification : where functional meets non-functionalLai, Xinhui; Balakrishnan, Aneesh; Lange, Thomas; Jenihhin, Maksim; Ghasempouri, Tara; Raik, Jaan; Alexandrescu, DanMicroprocessors and microsystems2019 / art. 102867, 13 p. : ill https://doi.org/10.1016/j.micpro.2019.102867 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

Verifying cache architecture vulnerabilities using a formal security verification flowGhasempouri, Tara; Raik, Jaan; Paul, Kolin; Reinbrecht, Cezar; Hamdioui, Said; Taouil, MottaqiallahMicroelectronics reliability2021 / art. 114085 https://doi.org/10.1016/j.microrel.2021.114085 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS