Hybrid BIST energy minimisation technique for system-on-chip testingJervan, Gert; Peng, Zebo; Shchenova, Tatjana; Ubar, Raimund-JohannesIEE proceedings computers & digital techniques2006 / 4, p. 208-216 : ill https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=5ae755d323ccba87f8ff886334e3dd6d33560874