Automated test bench generation for high-level synthesis flow ABELITEViilukas, Taavi; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Baranov, SamaryProceedings of IEEE East-West Design & Test Symposium (EWDTS'2011) : Sevastopol, Ukraine, September 9-12, 20112011 / p. 13-16 : ill https://ieeexplore.ieee.org/document/6116601