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Processor vulnerability detection with the aid of assertions : RISC-V case study (title)
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journal article
Processor vulnerability detection with the aid of assertions : RISC-V case study
Heidari Iman, Mohammad Reza
;
Ahmadi-Pour, Sallar
;
Drechsler, Rolf
;
Ghasempouri, Tara
techrxiv.org
2024
/
p. 1-8 : ill
https://doi.org/10.36227/techrxiv.172101134.45466090/v1
journal article
Related publications
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Enhancing assertion-based verification in hardware designs through data mining algorithms = Andmekaeve algoritmide kasutamine riistvarasüsteemide väidete-põhise verifitseerimise parendamiseks
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book article
Processor vulnerability detection with the aid of assertions : RISC-V case study
Heidari Iman, Mohammad Reza
;
Ahmadi-Pour, Sallar
;
Drechsler, Rolf
;
Ghasempouri, Tara
2024 IEEE Nordic Circuits and Systems Conference, NORCAS 2024 - Proceedings
2024
/
7 p.
https:/doi.org/10.1109/NorCAS64408.2024.10752460
Article at Scopus
Article at WOS
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RISC processor testing
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RISC-V Processor
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