- Logic simulation and fault collapsing with shared structurally synthesized BDDsMironov, Dmitri; Ubar, Raimund-Johannes; Raik, Jaan2014 19th IEEE European Test Symposium (ETS) : May 26th-30th, 2014, Paderborn, Germany : proceedings2014 / [2] p. : ill
- Modeling and simulation of circuits with shared structurally synthesized BDDsUbar, Raimund-Johannes; Jürimägi, Lembit; Raik, Jaan; Viies, VladimirMicroprocessors and microsystems2017 / p. 56-61 : ill https://doi.org/10.1016/j.micpro.2016.09.006 https://www.scopus.com/sourceid/15552 https://www.scopus.com/record/display.uri?eid=2-s2.0-85000632623&origin=inward&txGid=744c20a68a44b2968b1fc269551acff8 https://jcr.clarivate.com/jcr-jp/journal-profile?journal=MICROPROCESS%20MICROSY&year=2017 https://www.webofscience.com/wos/woscc/full-record/WOS:000392038000007