• A new testability calculation method to guide RTL test generationRaik, Jaan; Nõmmeots, Tanel; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications2005 / p. 71-82 : ill https://doi.org/10.1007/s10836-005-5288-5
• Design error diagnosis with re-synthesis in combinational circuitsUbar, Raimund-JohannesJournal of electronic testing : theory and applications2003 / 1, p. 73-82 : ill https://link.springer.com/article/10.1023/A:1021948013402
• High-Level Implementation-Independent Functional Software-Based Self-Test for RISC ProcessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanJournal of electronic testing : theory and applications2020 / p. 87-103 https://doi.org/10.1007/s10836-020-05856-7
• On the reuse of TLM mutation analysis at RTLGuarnieri, Valerio; Hantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications2012 / p. 435-448 : ill https://link.springer.com/article/10.1007/s10836-012-5303-6
• PSL assertion checking using temporally extended high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications2009 / 6, p. 289-300 : ill https://pld.ttu.ee/home/maksim/phd_papers/%5B11%5D%20latw%2708.pdf