• A scalable static test set compaction method for sequential circuitsAleksejev, Igor; Raik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesProceedings of the 9th IEEE Latin-American Test Workshop : LATW2008 : February 17-20, 2008, Puebla, Mexico2008 / p. 87-92 : ill
• Application of sequential test set compaction to LFSR reseedingAleksejev, Igor; Jutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes26th Norchip Conference : Tallinn, Estonia, 17-18 November 2008 : formal proceedings2008 / p. 102-107 : ill http://dx.doi.org/10.1109/NORCHP.2008.4738292
• BIST analyzer : a training platform for SoC testing [Electronic resource]Jutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich37th Annual Frontiers in Education Conference : Global Engineering : Knowledge Without Borders, Opportunities Without Passports : Milwaukee, Wisconsin, October 10-13, 20072007 / p. S3H-8-S3H-13 : ill. [CD-ROM] http://dx.doi.org/10.1109/FIE.2007.4418125
• Complex delay fault reasoning with sequential 7-valued algebraKõusaar, Jaak; Ubar, Raimund-Johannes; Aleksejev, Igor2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102403
• E-learning environment for WEB-based study of testingUbar, Raimund-Johannes; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Jenihhin, Maksim; Aleksejev, Igor; Tšepurov, Anton; Tšertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, Heinz-DietrichProceedings of the 8th European Workshop on Microelectronics Education : EWME 2010 : Darmstadt, Germany, 10-12 May 20102010 / p. 47-52 : ill
• Embedded instrumentation toolbox for screening marginal defects and outliers for productionOdintsov, Sergei; Jutman, Artur; Devadze, Sergei; Aleksejev, IgorIEEE AUTOTESTCON 2017 : Schaumburg, USA, Sept 11-14, 2017 : proceedings2017 / p. 336-334 : ill https://doi.org/10.1109/AUTEST.2017.8080516
• Embedded synthetic instruments for board-level testingJutman, Artur; Devadze, Sergei; Aleksejev, Igor; Wenzel, ThomasProceedings : 2012 17th IEEE European Test Symposium (ETS) : May 28th–June 1st, 2012, Annecy, France2012 / 1 p. : ill https://ieeexplore.ieee.org/document/6233044
• Fast extended test access via JTAG and FPGAsDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-JohannesInternational Test Conference 2009 : November 1 - November 6, 2009, Austin Convention Center, Austin, Texas USA : proceedings2009 / p. 1-7 : ill http://dx.doi.org/10.1109/TEST.2009.5355668
• FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est
• FPGA-based synthetic instrumentation for board testAleksejev, Igor; Jutman, Artur; Devadze, Sergei; Odintsov, Sergei; Wenzel, ThomasProceedings : International Test Conference 20122012 / p. 1-10 : ill https://ieeexplore.ieee.org/document/6401571
• IEEE P1687 IJTAG demonstrator on FPGAShibin, Konstantin; Aleksejev, Igor; Jutman, Artur; Devadze, SergeiDATE 2012 University Booth : Design Automation and Test in Europe : Dresden, Germany, March 12-16, 20122012 / 1 p. : ill https://www.academia.edu/22101517/IEEE_P1687_IJTAG_demonstrator_on_FPGA
• On coverage of timing related faults at board levelJutman, Artur; Aleksejev, Igor; Devadze, Sergei2016 21st IEEE European Test Symposium (ETS) : May 23rd-26th 2016, Amsterdam, The Netherlands : proceedings2016 / [2] p. : ill https://doi.org/10.1109/ETS.2016.7519295
• Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill https://doi.org/10.1007/s10836-016-5588-y https://www.scopus.com/sourceid/18040 https://www.scopus.com/record/display.uri?eid=2-s2.0-84964452131&origin=inward&txGid=035b6825dd1a37b925ec9c823fcecd7d https://jcr.clarivate.com/jcr-jp/journal-profile?journal=J%20ELECTRON%20TEST&year=2016 https://www.webofscience.com/wos/woscc/full-record/WOS:000377449900002
• Optimization of the store-and-generate based built-in self-testUbar, Raimund-Johannes; Jervan, Gert; Kruus, Helena; Orasson, Elmet; Aleksejev, IgorBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 199-202 : ill
• Reseeding using compaction of pre-generated LFSR sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : 31st August to 3rd September 2008, Malta : conference guide2008 / p. 215
• Reseeding using compaction of pre-generated LFSR sub-sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : Malta2008 / p. 1290-1295 : ill http://dx.doi.org/10.1109/ICECS.2008.4675096
• Run-time reconfigurable instruments for advanced board-level testingAleksejev, Igor; Jutman, Artur; Devadze, SergeiIEEE instrumentation & measurement magazine2017 / p. 23-30 : ill https://doi.org/10.1109/MIM.2017.8006390
• Run-time reconfigurable instruments for advanced board-level testingAleksejev, Igor; Jutman, Artur; Devadze, SergeiIEEE AUTOTESTCON 2016 : Anaheim, California, USA, September 12-15, 2016 : proceedings2016 / p. 385-392 : ill https://doi.org/10.1109/AUTEST.2016.7589627
• Sequential test set compaction in LFSR reseedingJutman, Artur; Aleksejev, Igor; Raik, JaanDesign and test technology for dependable systems-on-chip2011 / p. 476-493 : ill https://ieeexplore.ieee.org/document/4738292
• Teaching digital test with BIST analyzerJutman, Artur; Tšertov, Anton; Tšepurov, Anton; Aleksejev, Igor; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 123-128 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610171
• Turning JTAG inside out for fast extended test accessDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-Johannes10th IEEE Latin American Test Workshop : 2-5 March 2009, Brazil2009 / [6] p. : ill https://ieeexplore.ieee.org/document/4813799
• Ways for board and system test to benefit from FPGA embedded instrumentationEhrenberg, Heiko; Odintsov, Sergei; Devadze, Sergei; Jutman, Artur; Aleksejev, Igor; Wenzel, Thomas2019 IEEE AUTOTESTCON2019 / 10 p : ill https://doi.org/10.1109/AUTOTESTCON43700.2019.8961057
• Virtual reconfigurable scan-chains on FPGAs for optimized board testAleksejev, Igor; Jutman, Artur; Devadze, Sergei; Shibin, Konstantin2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102411