Logic-based implementation of fault-tolerant routing in 3D Network-on-Chips
author
statement of authorship
Behrad Niazmand, Siavoosh Payandeh Azad, Jose Flich, Jaan Raik, Gert Jervan, Thomas Hollstein
source
2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) : Nara, Japan, 31 August - 2 September 2016
location of publication
Piscataway
publisher
year of publication
pages
[8] p. : ill
conference name, date
10th IEEE/ACM International Symposium on Networks-on-Chip, 31 August-2 September, 2016
conference location
Nara, Japan
ISBN
978-1-4673-9030-9
notes
Bibliogr.: 25 ref
TTÜ department
language
inglise
subject term
keyword
Niazmand, B., Azad, S.P., Flich, J., Raik, J., Jervan G., Hollstein, T. Logic-based implementation of fault-tolerant routing in 3D Network-on-Chips // 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) : Nara, Japan, 31 August - 2 September 2016. Piscataway : IEEE, 2016. [8] p. : ill. https://doi.org/10.1109/NOCS.2016.7579317